riscv-opcodes - RISC-V opcodes

	Commit message (Collapse)	Author	Age
*	Update to privileged architecture version 1.7	Andrew Waterman	2015-05-09
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*	Merge [shm]call into ecall, [shm]ret into eret	Andrew Waterman	2015-03-17
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*	Add hcall instruction	Andrew Waterman	2015-03-12
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*	Update to new privileged spec	Andrew Waterman	2015-03-12
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*	New FP encoding	Andrew Waterman	2014-03-11
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*	Add fclass.{s\|d} instructions	Andrew Waterman	2014-03-06
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*	swap JAL/JALR again	Andrew Waterman	2014-01-13
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*	New privileged ISA	Andrew Waterman	2013-11-25
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*	fix slli/slliw encoding bug	Yunsup Lee	2013-11-21
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*	Update ISA encoding	Andrew Waterman	2013-09-21
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*	Rename MTFSR/MFFSR to FSSR/FRSR	Andrew Waterman	2013-08-06
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*	HW ignores upper bits of fence, but SW supplies 0	Andrew Waterman	2013-07-31
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*	Swap J and JALR encodings	Andrew Waterman	2013-07-31
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*	change supervisor encoding	Yunsup Lee	2013-07-26
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*	Factor out Hwacha/RVC and rename MFTX/MXTF to FMV	Andrew Waterman	2013-07-26
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*	Refactor parse-opcodes	Andrew Waterman	2013-07-25
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*	Remove JALR static hints	Andrew Waterman	2013-07-25
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*	Remove CFLUSH	Andrew Waterman	2013-07-23
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*	add auipc, lr, sc	Andrew Waterman	2013-04-17
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*	new supervisor mode	Andrew Waterman	2012-03-24
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*	change vector fence names/encoding	Andrew Waterman	2012-03-18
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*	clean up vector exception instructions	Yunsup Lee	2012-03-18
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*	add more instructions for vector exception handling	Yunsup Lee	2012-03-13
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*	add vvcfg,vtcfg	Yunsup Lee	2012-03-13
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*	opcodes cleanup	Yunsup Lee	2012-03-13
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*	slight change to vector supervisor instructions	Yunsup Lee	2012-03-10
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*	new instructions to handle vector exceptions	Yunsup Lee	2012-03-03
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*	temporary undoing of renaming	Andrew Waterman	2011-06-19
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*	Renamed packages	Andrew Waterman	2011-06-19
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*	[opcodes,pk,sim,xcc] resolve a conflict	Yunsup Lee	2011-05-15
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*	[libs,opcodes,pk,sim,xcc] add mov,fmov, shuffle vec insts	Yunsup Lee	2011-05-15
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*	tweaked encoding of rdcycle & cousins	Andrew Waterman	2011-05-13
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*	[opcodes] reordered RVC instructions	Andrew Waterman	2011-05-06
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*	[xcc,sim,opcodes] added c.addiw	Andrew Waterman	2011-04-24
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*	[xcc,sim,opcodes] added more RVC instructions	Andrew Waterman	2011-04-24
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*	[xcc,sim,opcodes] added rvc conditional branches	Andrew Waterman	2011-04-18
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*	[xcc,pk,sim] added privileged cflush instruction	Andrew Waterman	2011-04-12
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*	[xcc,sim] rvc loads and stores	Andrew Waterman	2011-04-12
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*	[xcc,sim,opcodes] more rvc instructions and bug fixes	Andrew Waterman	2011-04-11
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*	[xcc, sim] added rvc insn c.li; misc fixes	Andrew Waterman	2011-04-09
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*	[xcc,pk,sim,opcodes] added first RVC instruction	Andrew Waterman	2011-04-09
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*	[opcodes,pk,sim,xcc] fix utidx - add rd	Yunsup Lee	2011-04-06
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*	[opcodes,pk,sim,xcc] fix vector mem instruction format, add vector seg mem ↵	Yunsup Lee	2011-04-05
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*	[opcodes,pk,sim,xcc] add leftover vector instructions (vf, etc.)	Yunsup Lee	2011-04-04
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*	[opcodes,pk,sim,xcc] add vector mem instructions	Yunsup Lee	2011-04-04
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*	[opcodes,pk,sim,xcc] add stop,utidx instructions	Yunsup Lee	2011-04-04
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*	[opcodes,pk,sim,xcc] add fence instructions for vector unit	Yunsup Lee	2011-04-04
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*	[opcodes] minor opcode changes	Andrew Waterman	2011-03-25
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*	[sim,pk,xcc,opcodes] removed fminmag/fmaxmag	Andrew Waterman	2011-03-25
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*	[xcc,pk,opcodes,sim] updated encoding/insn names	Andrew Waterman	2011-03-25
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