Commit message (Collapse) | Author | Age | |
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* | Go: Return rs2 value for each instructionsHEADmaster | Benjamin Barenblat | 2016-07-22 |
| | | | | | Some binary floating-point instructions (ab)use the rs2 value to hold additional instruction data, so we need that data in the Go assembler. | ||
* | Go: Make gofmt-clean | Benjamin Barenblat | 2016-07-22 |
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* | Go: Return 'ok' status instead of 'err' status | Benjamin Barenblat | 2016-07-22 |
| | | | | Also clean up imports. | ||
* | Go: Return errors out of band | Benjamin Barenblat | 2016-04-14 |
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* | Go: Update parse-opcodes to use obj.As | Benjamin Barenblat | 2016-03-10 |
| | | | | See https://github.com/golang/go/commit/0d9258a830c585. | ||
* | Go: Print CSRs as signed values | Benjamin Barenblat | 2016-02-26 |
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* | Go: Emit all instructions | Benjamin Barenblat | 2016-02-22 |
| | | | | | Changes to the RISC-V Go implementation obviate the need for GO_UNUSED_INSTRUCTIONS. | ||
* | Go: Also generate funct3, csr, and funct7 encodings | Benjamin Barenblat | 2016-02-22 |
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* | Clarify use of yank in Go backend | Benjamin Barenblat | 2016-01-21 |
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* | Support generating Go code | Benjamin Barenblat | 2016-01-21 |
| | | | | | Generate Go code for the RISC-V Go port <https://github.com/riscv/riscv-go>. | ||
* | remove hwachaV3 definitions | Colin Schmidt | 2016-01-13 |
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* | add miobase, mipi; drop send_ipi | Andrew Waterman | 2015-11-12 |
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* | Revert "Revert "Enable the four custom instructions"" | Andrew Waterman | 2015-11-06 |
| | | | | This reverts commit fe5742618c1732be6000cccfbed3432596dea9e4. | ||
* | Update to hopefully final RVC 1.9 encoding | Andrew Waterman | 2015-10-20 |
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* | rvc 1.8 candidate | Andrew Waterman | 2015-10-12 |
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* | move towards RVC 1.8 | Andrew Waterman | 2015-10-05 |
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* | In C headers, keep instructions in original input order | Andrew Waterman | 2015-09-28 |
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* | Include pseudo-ops in inst.chisel | Andrew Waterman | 2015-09-28 |
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* | No need to provide GCC with encoding.h anymore | Andrew Waterman | 2015-09-08 |
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* | Use BitPat instead of Bits for Chisel3 | Andrew Waterman | 2015-09-08 |
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* | update to latest RVC proposal | Andrew Waterman | 2015-09-08 |
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* | Remove automatically-generated files | Andrew Waterman | 2015-09-02 |
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* | Fix DECLARE_CAUSE macros | Andrew Waterman | 2015-07-28 |
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* | New machine-mode timer facility | Andrew Waterman | 2015-07-05 |
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* | RVC v1.7 encoding | Andrew Waterman | 2015-05-31 |
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* | Fix VM, MIP encoding | Andrew Waterman | 2015-05-14 |
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* | Update to privileged architecture version 1.7 | Andrew Waterman | 2015-05-09 |
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* | Distinguish Sv39/Sv48; reserve some PPN bits | Andrew Waterman | 2015-04-02 |
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* | RVC draft | Andrew Waterman | 2015-03-30 |
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* | New virtual memory implementation (Sv39) | Andrew Waterman | 2015-03-24 |
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* | Merge [shm]call into ecall, [shm]ret into eret | Andrew Waterman | 2015-03-17 |
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* | vxcpthold exposes the first source operand | Yunsup Lee | 2015-03-16 |
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* | Add hcall instruction | Andrew Waterman | 2015-03-12 |
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* | Add referenced/dirty bits to PTE | Andrew Waterman | 2015-03-12 |
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* | Update to new privileged spec | Andrew Waterman | 2015-03-12 |
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* | update location of headers for new ABI/toolchain | Colin Schmidt | 2014-12-14 |
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* | Revert "Enable the four custom instructions" | Yunsup Lee | 2014-11-22 |
| | | | | | | This reverts commit 70b52dd5fa74b5968a20ded22df4ae3a9a76d7f4. Refactoring support for custom instructions. | ||
* | Merge branch 'pr/1' | Yunsup Lee | 2014-10-24 |
|\ | | | | | | | | | Conflicts: Makefile | ||
* | | Prevent regenerating the Hwacha spike header by default | Albert Ou | 2014-10-23 |
| | | | | | | | | | | | | Not every instruction in the main opcodes file is implemented by Hwacha; at present, updating opcodes_hwacha_ut.h requires manual culling of the unneeded instructions to avoid breaking the spike build. | ||
| * | Enable the four custom instructions | Arun Thomas | 2014-10-23 |
|/ | | | | | | | | Will update encoding.h in the following components: * riscv-isa-sim * riscv-pk * riscv-test-env | ||
* | Move stats register | Stephen Twigg | 2014-04-03 |
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* | Add hwacha spike header file target | Stephen Twigg | 2014-04-03 |
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* | Add rdcycleh etc. for RV32 | Andrew Waterman | 2014-03-18 |
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* | Fix syntax error in generated opcodes | Andrew Waterman | 2014-03-11 |
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* | New FP encoding | Andrew Waterman | 2014-03-11 |
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* | Add fclass.{s|d} instructions | Andrew Waterman | 2014-03-06 |
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* | add hwacha vfmsv instructions | Yunsup Lee | 2014-03-02 |
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* | Renumber uarch CSRs into custom CSR space | Andrew Waterman | 2014-02-14 |
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* | Reserve 16 uarch-specific read-only userspace counters | Andrew Waterman | 2014-02-06 |
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* | Add vfmvv, vfmsv instructions, remove vsetprec | Quan Nguyen | 2014-02-03 |
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