riscv-opcodes - RISC-V opcodes

	Commit message (Expand)	Author	Age
...
*	[xcc,opcodes,pk,sim] krste's re-renaming spree	Andrew Waterman	2011-02-15
*	[xcc,sim,opcodes] removed mtflh/mffl/mffh	Andrew Waterman	2011-02-15
*	[sim,xcc,opcodes] added back mtflh.d	Andrew Waterman	2011-02-02
*	[opcodes,pk,sim,xcc] synci now bombs whole icache	Andrew Waterman	2011-02-02
*	[xcc,opcodes,pk,sim] cleanup to FP ISA	Andrew Waterman	2011-02-01
*	[sim,opcodes] add mulhsu instruction	Andrew Waterman	2011-01-25
*	[opcodes,pk,sim,xcc] great renumbering of 2011, part deux	Andrew Waterman	2011-01-25
*	[sim, pk, xcc, opcodes] great instruction renaming of 2011	Andrew Waterman	2011-01-20
*	[opcodes, sim, xcc] made *w insns illegal in RV32	Andrew Waterman	2011-01-18
*	[opcodes, pk, sim, xcc] removed nor, normalized macros to addi	Andrew Waterman	2011-01-17
*	[opcodes,pk,sim,xcc] flip fields to favor little endian	Yunsup Lee	2011-01-03
*	[opcodes, pk, sim, xcc] Tweaked FP encoding	Andrew Waterman	2010-11-21
*	[opcodes] generate latex and verilog correctly	Andrew Waterman	2010-11-21
*	[xcc, sim, pk, opcodes] new instruction encoding!	Andrew Waterman	2010-11-21
*	[opcodes, pk, sim, xcc] made jumps shorter and PC-relative	Andrew Waterman	2010-11-21
*	[opcodes] add latex table for rm stuff	Yunsup Lee	2010-10-31
*	[sim,xcc,pk,opcodes] static rounding modes for FP insns	Andrew Waterman	2010-10-25
*	[xcc] modified opcodes for better FP decode mapping	Andrew Waterman	2010-10-07
*	[opcodes] added code field back to syscall/break	Andrew Waterman	2010-10-05
*	[xcc, sim] mff now uses rs2 for data	Andrew Waterman	2010-10-02
*	[opcodes, sim, xcc] added mffl.d instruction	Andrew Waterman	2010-09-28
*	[xcc, sim] changed instruction format so imm12 subs for rs2	Andrew Waterman	2010-09-20
*	[xcc, sim] replaced ble/bleu with bge/bgeu	Andrew Waterman	2010-09-13
*	[sim] renamed sllv to sll (same for other shifts)	Andrew Waterman	2010-09-12
*	[xcc, sim] moved shamt field and renamed shifts	Andrew Waterman	2010-09-12
*	[xcc, sim] branches now are next-PC-based, not PC-based	Andrew Waterman	2010-09-12
*	[sim, xcc] Added mffh.d/mtflh.d; fixed FP ABI for 32-bit	Andrew Waterman	2010-09-10
*	[opcodes,xcc,sim] mffh.d,mtfh.d added (broken commit)	Yunsup Lee	2010-09-10
*	[opcodes] latex table generation added, new opcode mapping	Yunsup Lee	2010-09-10
*	[opcodes,sim,xcc] move opcodes for 3 source instructions	Yunsup Lee	2010-09-09
*	Revert "[xcc, sim] added slei/sleui in lieu of slti/sltiu"	Andrew Waterman	2010-09-09
*	[xcc, sim] added slei/sleui in lieu of slti/sltiu	Andrew Waterman	2010-09-07
*	[sim, xcc] bthread threading model exposed; insn encoding cleaned up	Andrew Waterman	2010-09-06
*	[sim] added atomic memory operations	Andrew Waterman	2010-09-06
*	[xcc,sim] added fused multiply-add and its cousins	Andrew Waterman	2010-08-22
*	[xcc,sim] Eliminated slori instruction	Andrew Waterman	2010-08-22
*	[xcc,sim] implement FP using softfloat	Andrew Waterman	2010-08-09
*	[sim,xcc] Added first few Hauser FP insns (sign-injection)	Andrew Waterman	2010-08-05
*	[xcc] Removed ctc1, cfc1 instructions; added fp move test case	Andrew Waterman	2010-08-04
*	[xcc,pk,sim] Added first part of FP support	Andrew Waterman	2010-08-04
*	[sim,xcc] removed sll32/srl32/sra32 opcodes	Andrew Waterman	2010-08-03
*	[pk,sim,xcc] Renamed instructions to RISC-V spec	Andrew Waterman	2010-08-03
*	[sim,xcc] Changed instruction format to RISC-V	Andrew Waterman	2010-07-28
*	Reorganized directory structure	Andrew Waterman	2010-07-18