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path: root/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
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* dyncom: Minor cleanupGravatar Lioncash2015-03-10
| | | | Assemblers will exit with an error when trying to assemble instructions with disallowed registers.
* dyncom: Fix an indexing bug in STMGravatar Lioncash2015-03-08
| | | | Previously it would write the contents of register 13 for the case where the link register (r14) is supposed to be written.
* dyncom: General cleanup of STMGravatar Lioncash2015-03-08
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* dyncom: Increment addr when accessing LR in LDMGravatar Lioncash2015-03-08
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* Add profiling infrastructure and widgetGravatar Yuri Kunde Schlesner2015-03-01
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* arm: The CP15 Main ID register is not writeableGravatar Lioncash2015-02-26
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* Cleaned up unaligned access.Gravatar Kevin Hartman2015-02-21
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* dyncom: Support conditional BKPT instructionsGravatar Lioncash2015-02-17
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* dyncom: Actually set the destination register for USAD8/USADA8.Gravatar Lioncash2015-02-16
| | | | Idiotville: Population: 1 - Inhabitant name: Lioncash
* core: Apply static to local functionsGravatar Lioncash2015-02-13
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* arm: General cleanupGravatar Lioncash2015-02-13
| | | | | | | - Remove several typedefs for ARMul_State. - Remove unused functions - Remove unused/unnecessary headers - Removed unused enums, etc.
* dyncom: Remove warning for SXTAHGravatar Lioncash2015-02-12
| | | | This is tested to work correctly.
* dyncom: Add more regs to MCR/MRCGravatar Lioncash2015-02-10
| | | | Adds the registers that were left out of some coprocessor ranges.
* dyncom: Remove more unnecessary codeGravatar Lioncash2015-02-03
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* core: Fix some warnings on OSXGravatar Lioncash2015-02-03
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* arm: Adios armemuGravatar Lioncash2015-01-31
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* dyncom: Minor cleanupGravatar Lioncash2015-01-27
| | | | Narrow scopes for the instruction variables. Remove unnecessary parentheses.
* dyncom: Minor cleanupGravatar Lioncash2015-01-22
| | | | Removes some unused macros and cleans up indentation inconsistencies
* dyncom: Clarify precedence for ternary statementsGravatar Lioncash2015-01-19
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* dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etcGravatar Lioncash2015-01-18
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* dyncom: Handle the ARM A2 encoding of STRT/LDRTGravatar Lioncash2015-01-17
| | | | These were also missing the shifted register case.
* dyncom: Handle the ARM A2 encoding of LDRBT/STRBT.Gravatar Lioncash2015-01-16
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* dyncom: Fix 32-bit ASR shifts for immediatesGravatar Lioncash2015-01-12
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* dyncom: Remove unused flag macrosGravatar Lioncash2015-01-12
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* dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoopGravatar Lioncash2015-01-12
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* dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBCGravatar Lioncash2015-01-12
| | | | Also cleans up CMN, and CMP.
* dyncom: Add a helper function for addition with a carryGravatar Lioncash2015-01-12
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* dyncom: Fix ADC overflow flag settingGravatar Lioncash2015-01-11
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* dyncom: Fix conditional execution of MSRGravatar Lioncash2015-01-11
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* dyncom: Fix UMAALGravatar Lioncash2015-01-08
| | | | These need to be done as a 64-bit operation.
* dyncom: Fix SMULWB/SMULWTGravatar Lioncash2015-01-07
| | | | Wasn't doing proper sign-extension
* Merge pull request #438 from lioncash/swpGravatar bunnei2015-01-07
|\ | | | | dyncom: Fix SWPB
| * dyncom: Fix SWPBGravatar Lioncash2015-01-07
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* | dyncom: Move over SMLALXYGravatar Lioncash2015-01-07
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* Merge pull request #417 from kevinhartman/exclusive-tag-fixGravatar bunnei2015-01-06
|\ | | | | Added exclusive reservation granule from ARMv7 spec to dyncom...
| * Added exclusive reservation granule from ARMv7 spec to dyncom to protect ↵Gravatar Kevin Hartman2015-01-05
| | | | | | | | LDR/STREX.
* | dyncom: Partially emulate BXJGravatar Lioncash2015-01-05
| | | | | | | | Just in case some game studio let the intern write inline assembly or something.
* | dyncom: Actually set the Q flag for SMLABB/SMLABT/SMLATB/SMLATTGravatar Lioncash2015-01-05
| | | | | | | | Easy skyeye todo fix.
* | Merge pull request #418 from lioncash/qdGravatar bunnei2015-01-05
|\ \ | | | | | | dyncom: Implement QADD/QSUB/QDADD/QDSUB
| * | dyncom: Implement QADD/QSUB/QDADD/QDSUBGravatar Lioncash2015-01-05
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* | | skyeye: Remove duplicate typedefsGravatar Lioncash2015-01-04
|/ / | | | | | | citra already has its own typedefs like this.
* / dyncom: Implement SMLAWGravatar Lioncash2015-01-03
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* Merge pull request #395 from lioncash/revGravatar bunnei2015-01-02
|\ | | | | dyncom: Implement REVSH
| * dyncom: Implement REVSHGravatar Lioncash2015-01-02
| | | | | | | | Also joins the REV ops into one common place.
* | dyncom: Implement SMLALD/SMLSLDGravatar Lioncash2015-01-02
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* Merge pull request #392 from lioncash/smGravatar bunnei2015-01-02
|\ | | | | dyncom: Implement SMMLA/SMMUL/SMMLS
| * dyncom: Implement SMMLA/SMMUL/SMMLSGravatar Lioncash2015-01-02
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* | dyncom: Implemented LDREXD/STREXD/LDREXH/STREXHGravatar bunnei2015-01-02
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* Merge pull request #390 from lioncash/wutGravatar bunnei2015-01-02
|\ | | | | dyncom: Remove dead function InterpreterInitInstLength
| * dyncom: Remove dead function InterpreterInitInstLengthGravatar Lioncash2015-01-02
| | | | | | | | Technically eliminates two memory leaks as well.
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