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authorGravatar Lioncash <mathew1800@gmail.com>2015-01-12 14:12:05 -0500
committerGravatar Lioncash <mathew1800@gmail.com>2015-01-12 14:15:24 -0500
commitf7770b83d49f3ac791f095ade399705a4d04fe63 (patch)
tree55448ac982348dae114371d67ad9fb899370b1e1 /src/core/arm/dyncom/arm_dyncom_interpreter.cpp
parentac05c4acb0dee32c9b64d03640bc4da53ec296b9 (diff)
dyncom: Fix 32-bit ASR shifts for immediates
Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_interpreter.cpp')
-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index c6a9baae..b5e0993e 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -176,13 +176,11 @@ unsigned int DPO(ArithmeticShiftRightByImmediate)(arm_processor *cpu, unsigned i
unsigned int shifter_operand;
int shift_imm = BITS(sht_oper, 7, 11);
if (shift_imm == 0) {
- if (BIT(rm, 31)) {
+ if (BIT(rm, 31) == 0)
shifter_operand = 0;
- cpu->shifter_carry_out = BIT(rm, 31);
- } else {
+ else
shifter_operand = 0xFFFFFFFF;
- cpu->shifter_carry_out = BIT(rm, 31);
- }
+ cpu->shifter_carry_out = BIT(rm, 31);
} else {
shifter_operand = static_cast<int>(rm) >> shift_imm;
cpu->shifter_carry_out = BIT(rm, shift_imm - 1);