diff options
author | Lioncash <mathew1800@gmail.com> | 2015-01-19 20:25:31 -0500 |
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committer | Lioncash <mathew1800@gmail.com> | 2015-01-19 20:35:55 -0500 |
commit | 8c6edc680c2e4ca2193b3e8e1a88629ca72f1de8 (patch) | |
tree | e3a5e8e7ce1dd0d56b1a828ad672f17aa586b138 /src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |
parent | 004b23153b2864f6072f0c71027f392b6b424510 (diff) |
dyncom: Clarify precedence for ternary statements
Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_interpreter.cpp')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index ffe9d17f..fce8d8e4 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -4177,7 +4177,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) { cpu->Reg[14] = (cpu->Reg[15] + GET_INST_SIZE(cpu)); cpu->TFlag = 0x1; int signed_int = inst_cream->val.signed_immed_24; - signed_int = (signed_int) & 0x800000 ? (0x3F000000 | signed_int) : signed_int; + signed_int = (signed_int & 0x800000) ? (0x3F000000 | signed_int) : signed_int; signed_int = signed_int << 2; cpu->Reg[15] = cpu->Reg[15] + 8 + signed_int + (BIT(inst, 24) << 1); } |