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path: root/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
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* ARM Core, Video Core, CitraQt, Citrace: Use CommonTypes types instead of the ↵Gravatar Emmanuel Gil Peyrot2015-08-11
| | | | standard u?int*_t types.
* Merge pull request #1008 from lioncash/pcGravatar bunnei2015-07-30
|\ | | | | dyncom: Handle the case where PC is the source register for STR/VSTM/VLDM
* | dyncom: Remove an unused variableGravatar Lioncash2015-07-29
| | | | | | | | This was used prior to InterpreterTranslate existing.
| * dyncom: Handle the case where PC is the source register for STR/VSTM/VLDMGravatar Lioncash2015-07-29
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* dyncom: Handle left-operand PC correctly for data-processing opsGravatar Lioncash2015-07-28
| | | | | | This is considered deprecated in the ARM manual (using PC as an operand), however, this is still able to be executed on the MPCore (which I'm quite sure would be rare to begin with).
* dyncom: Use enum class for instruction decoding resultsGravatar Lioncash2015-07-28
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* dyncom: Remove code duplication regarding thumb instructionsGravatar Lioncash2015-07-27
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* dyncom: Migrate exclusive memory access control into armstateGravatar Lioncash2015-07-27
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* dyncom: Remove duplicated typedef and externGravatar Lioncash2015-07-27
| | | | These are already present in arm_dyncom_dec.h.
* dyncom: Use ARMul_State as an objectGravatar Lioncash2015-07-26
| | | | Gets rid of C-like parameter passing.
* dyncom: Rename armdefs.h to armstate.hGravatar Lioncash2015-07-25
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* dyncom: Get rid of skyeye typedefsGravatar Lioncash2015-07-25
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* dyncom: Move helper functions to their own headerGravatar Lioncash2015-07-25
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* dyncom: Pass SVC immediates directly.Gravatar Lioncash2015-07-21
| | | | Previously it would just re-read the already decoded instruction and extract the immediate value.
* dyncom: Properly retrieve the PC value in BX if used.Gravatar Lioncash2015-07-19
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* arm_dyncom_interpreter: Simplify assignment in SMLAWGravatar Lioncash2015-07-16
| | | | Also a side-benefit of not having implementation-defined behavior.
* Remove every trailing whitespace from the project (but externals).Gravatar Emmanuel Gil Peyrot2015-05-29
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* arm_dyncom_interpreter: Remove unused variableGravatar Lioncash2015-05-26
| | | | Thum decoding directly checks if the thumb bit is set instead of using a temporary.
* arm_dyncom_interpreter: Remove unused macroGravatar Lioncash2015-05-24
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* dyncom: Remove unused cpu parameter from decode_thumb_instrGravatar Lioncash2015-05-22
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* dyncom: remove load_r15 from arm_instGravatar Lioncash2015-05-22
| | | | It's entirely unused. Also allows getting rid of more clunky macros.
* dyncom: Remove unnecessary parameter for load/store operationsGravatar Lioncash2015-05-22
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* dyncom: Eliminate clang warningsGravatar Lioncash2015-05-21
| | | | Gets rid of a whole load of missing brace initialization warnings.
* Merge pull request #774 from lioncash/decodingsGravatar Yuri Kunde Schlesner2015-05-15
|\ | | | | dyncom: Add ARMv6K NOP and hint instructions to the interpreter.
* \ Merge pull request #770 from lioncash/dyncom_cleanGravatar bunnei2015-05-15
|\ \ | | | | | | dyncom: Minor cleanup.
* | | Memmap: Re-organize memory function in two filesGravatar Yuri Kunde Schlesner2015-05-15
| | | | | | | | | | | | | | | | | | | | | memory.cpp/h contains definitions related to acessing memory and configuring the address space mem_map.cpp/h contains higher-level definitions related to configuring the address space accoording to the kernel and allocating memory.
| | * dyncom: Add ARMv6K NOP and hint instructions to the decoding tableGravatar Lioncash2015-05-14
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| | * dyncom: Handle some MSR variants individuallyGravatar Lioncash2015-05-14
| | | | | | | | | | | | This is necessary, as hint instructions will be recognized as MSR, which is pretty bad.
| | * dyncom: Move exclusive load/stores above bbl and swi in the decoding tableGravatar Lioncash2015-05-14
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| * dyncom: Remove duplicate enums/prototypesGravatar Lioncash2015-05-14
| | | | | | | | These are already defined in arm_dyncom_interpreter_dec.cpp.
| * dyncom: Remove unnecessary definesGravatar Lioncash2015-05-14
| | | | | | | | These can simply be const vars.
| * dyncom: Make translation-unit functions and variables staticGravatar Lioncash2015-05-14
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| * dyncom: Remove unnecessary typedefsGravatar Lioncash2015-05-14
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| * dyncom: Remove unused structsGravatar Lioncash2015-05-14
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* dyncom: Fix decoding of BKPT's immediateGravatar Lioncash2015-05-13
| | | | A shift here is intended since the representation is imm12:imm4
* dyncom: Stub MCRR and MRRCGravatar Lioncash2015-05-11
| | | | | There's no other coprocessor outside the VFP (which has its own VMOV variants) in which the MPCore can send/retrieve data from. Stubbed so citra won't crash and burn on the odd chance someone actually tries to use these.
* dyncom: Remove an unnecessary variable in the interpreterGravatar Lioncash2015-05-07
| | | | All this was doing was needlessly aliasing a variable.
* HLE: Clean up SVC dispatch mechanismGravatar Yuri Kunde Schlesner2015-05-06
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* Dyncom: Move cream cache to ARMul_State.Gravatar bunnei2015-05-01
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* dyncom: Remove unnecessary enum and typedefGravatar Lioncash2015-04-07
| | | | Also fixes descriptions in the process.
* Merge pull request #685 from lioncash/cpregsGravatar bunnei2015-04-06
|\ | | | | dyncom: Set the MPCore CP15 register reset values on initialization.
| * Move CP15 enum definitions into their own enum.Gravatar Lioncash2015-04-06
| | | | | | | | Also gets rid of preprocessor mumbo-jumbo
* | dyncom: Suppress uninitialized variable warningsGravatar Lioncash2015-04-05
|/ | | | The switch cases will always be hit, but this makes compilers stop complaining.
* dyncom: Move CP15 register writing into its own function.Gravatar Lioncash2015-04-02
| | | | Also implements writing to the rest of the ARM11 MPCore CP15 register set.
* dyncom: Move CP15 register reading into its own function.Gravatar Lioncash2015-04-02
| | | | Keeps everything contained. Added all supported readable registers in an ARM11 MPCore.
* dyncom: Migrate InAPrivilegedMode to armsuppGravatar Lioncash2015-03-26
| | | | It's a generic helper function, so it should be here anyway.
* dyncom: Implement SRSGravatar Lioncash2015-03-24
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* dyncom: Implement RFEGravatar Lioncash2015-03-24
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* dyncom: Make Load/Store instructions support big endianGravatar Lioncash2015-03-17
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* dyncom: Implement SETENDGravatar Lioncash2015-03-14
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