Commit message (Collapse) | Author | Age | |
---|---|---|---|
* | [opcodes] add latex table for rm stuff | 2010-10-31 | |
| | |||
* | [sim,xcc,pk,opcodes] static rounding modes for FP insns | 2010-10-25 | |
| | | | | | | Now, you can either use the RM in the FSR or specify it in the insn. (Except for FP->int; no dynamic for that.) | ||
* | [opcodes] changed formatting of optab section headers | 2010-10-20 | |
| | |||
* | [opcodes] updated parse-opcodes for latex tables | 2010-10-05 | |
| | |||
* | [opcodes] update parse-opcodes | 2010-10-05 | |
| | |||
* | [xcc, sim] changed instruction format so imm12 subs for rs2 | 2010-09-20 | |
| | |||
* | [opcodes] fixed tex table for ish,ishw types | 2010-09-12 | |
| | |||
* | [opcodes] change rsh to ish types | 2010-09-12 | |
| | |||
* | [opcodes] fixed verilog generation for ish,ishw types | 2010-09-12 | |
| | |||
* | [xcc, sim] moved shamt field and renamed shifts | 2010-09-12 | |
| | |||
* | add -verilog option | 2010-09-12 | |
| | |||
* | [opcodes] latex table generation added, new opcode mapping | 2010-09-10 | |
| | |||
* | [sim] added atomic memory operations | 2010-09-06 | |
| | |||
* | [xcc,sim] added fused multiply-add and its cousins | 2010-08-22 | |
| | |||
* | [sim,xcc] removed sll32/srl32/sra32 opcodes | 2010-08-03 | |
| | | | | | These instructions handled static shift amounts >= 32. Since we have a 6-bit shift amount field, these opcodes are no longer necessary. | ||
* | [sim,xcc] Changed instruction format to RISC-V | 2010-07-28 | |
| | | | | | Massive changes to gcc, binutils to support new instruction encoding. Simulator reflects these changes. | ||
* | Reorganized directory structure | 2010-07-18 | |
Moved cross-compiler to /xcc/ rather than / Added ISA sim in /sim/ Added Proxy Kernel in /pk/ (to be cleaned up) Added opcode map to /opcodes/ (ditto) Added documentation to /doc/ |