Commit message (Expand) | Author | Age | |
---|---|---|---|
* | [opcodes] fixed tex table for ish,ishw types | 2010-09-12 | |
* | [opcodes] change rsh to ish types | 2010-09-12 | |
* | [opcodes] fixed verilog generation for ish,ishw types | 2010-09-12 | |
* | [xcc, sim] moved shamt field and renamed shifts | 2010-09-12 | |
* | add -verilog option | 2010-09-12 | |
* | [opcodes] latex table generation added, new opcode mapping | 2010-09-10 | |
* | [sim] added atomic memory operations | 2010-09-06 | |
* | [xcc,sim] added fused multiply-add and its cousins | 2010-08-22 | |
* | [sim,xcc] removed sll32/srl32/sra32 opcodes | 2010-08-03 | |
* | [sim,xcc] Changed instruction format to RISC-V | 2010-07-28 | |
* | Reorganized directory structure | 2010-07-18 |