summaryrefslogtreecommitdiff
path: root/parse-opcodes
Commit message (Expand)AuthorAge
* [opcodes,pk,sim,xcc] great renumbering of 2011, part deuxGravatar Andrew Waterman2011-01-25
* [sim, pk, xcc, opcodes] great instruction renaming of 2011Gravatar Andrew Waterman2011-01-20
* [opcodes,pk,sim,xcc] flip fields to favor little endianGravatar Yunsup Lee2011-01-03
* [opcodes, pk, sim, xcc] Tweaked FP encodingGravatar Andrew Waterman2010-11-21
* [opcodes] generate latex and verilog correctlyGravatar Andrew Waterman2010-11-21
* [xcc, sim, pk, opcodes] new instruction encoding!Gravatar Andrew Waterman2010-11-21
* [opcodes, pk, sim, xcc] made jumps shorter and PC-relativeGravatar Andrew Waterman2010-11-21
* [opcodes] add latex table for rm stuffGravatar Yunsup Lee2010-10-31
* [sim,xcc,pk,opcodes] static rounding modes for FP insnsGravatar Andrew Waterman2010-10-25
* [opcodes] changed formatting of optab section headersGravatar Andrew Waterman2010-10-20
* [opcodes] updated parse-opcodes for latex tablesGravatar Yunsup Lee2010-10-05
* [opcodes] update parse-opcodesGravatar Yunsup Lee2010-10-05
* [xcc, sim] changed instruction format so imm12 subs for rs2Gravatar Andrew Waterman2010-09-20
* [opcodes] fixed tex table for ish,ishw typesGravatar Yunsup Lee2010-09-12
* [opcodes] change rsh to ish typesGravatar Yunsup Lee2010-09-12
* [opcodes] fixed verilog generation for ish,ishw typesGravatar Yunsup Lee2010-09-12
* [xcc, sim] moved shamt field and renamed shiftsGravatar Andrew Waterman2010-09-12
* add -verilog optionGravatar Yunsup Lee2010-09-12
* [opcodes] latex table generation added, new opcode mappingGravatar Yunsup Lee2010-09-10
* [sim] added atomic memory operationsGravatar Andrew Waterman2010-09-06
* [xcc,sim] added fused multiply-add and its cousinsGravatar Andrew Waterman2010-08-22
* [sim,xcc] removed sll32/srl32/sra32 opcodesGravatar Andrew Waterman2010-08-03
* [sim,xcc] Changed instruction format to RISC-VGravatar Andrew Waterman2010-07-28
* Reorganized directory structureGravatar Andrew Waterman2010-07-18