[xcc,sim] rvc loads and stores

3 files changed, 24 insertions, 4 deletions

diff --git a/inst.v b/inst.v
index e0f9153..4592974 100644
--- a/inst.v
+++ b/inst.v
@@ -231,3 +231,11 @@
 `define C_LI       32'b00000000000000000000000000000000
 `define C_MOVE     32'b00000000000000000000000000000000
 `define C_J        32'b00000000000000000000000000000000
+`define C_LDSP     32'b00000000000000000000000000000000
+`define C_LWSP     32'b00000000000000000000000000000000
+`define C_SDSP     32'b00000000000000000000000000000000
+`define C_SWSP     32'b00000000000000000000000000000000
+`define C_LD       32'b00000000000000000000000000000000
+`define C_LW       32'b00000000000000000000000000000000
+`define C_SD       32'b00000000000000000000000000000000
+`define C_SW       32'b00000000000000000000000000000000
diff --git a/opcodes b/opcodes
index fbc039e..3a3ccf2 100644
--- a/opcodes
+++ b/opcodes
@@ -317,7 +317,15 @@ setvl       rd       rs1 21..10=0 9..7=1     6..2=0x1C 1..0=3
 vf          31..27=0 rs1 imm12    9..7=2     6..2=0x1C 1..0=3
 
 # compressed instructions
-c.addi    cimm6  crd 4..0=0
-c.li      cimm6  crd 4..0=1
-c.move 15=0 crs1 crd 4..0=2
-c.j    15=1  cimm10  4..0=2
+c.addi    cimm6   crd 4..0=0
+c.li      cimm6   crd 4..0=1
+c.move 15=0 crs1  crd 4..0=2
+c.j    15=1   cimm10  4..0=2
+c.ldsp    cimm6   crd 4..0=4
+c.lwsp    cimm6   crd 4..0=5
+c.sdsp    cimm6   crd 4..0=6
+c.swsp    cimm6   crd 4..0=8
+c.ld   crds crs1s cimm5 4..0=9
+c.lw   crds crs1s cimm5 4..0=10
+c.sd   crds crs1s cimm5 4..0=12
+c.sw   crds crs1s cimm5 4..0=13
diff --git a/parse-opcodes b/parse-opcodes
index 1777104..0e8fa06 100755
--- a/parse-opcodes
+++ b/parse-opcodes
@@ -27,8 +27,12 @@ arglut['shamtw'] = (14,10)
 arglut['crd'] = (9,5)
 arglut['crs2'] = (9,5)
 arglut['crs1'] = (14,10)
+arglut['crds'] = (15,13)
+arglut['crs2s'] = (15,13)
+arglut['crs1s'] = (12,10)
 arglut['cimm6'] = (15,10)
 arglut['cimm10'] = (14,5)
+arglut['cimm5'] = (9,5)
 
 typelut = {} # 0=unimp,1=j,2=lui,3=imm,4=r,5=r4,6=ish,7=ishw,10=b
 typelut[0x03] = 3