[xcc,sim,opcodes] more rvc instructions and bug fixes

3 files changed, 10 insertions, 3 deletions

diff --git a/inst.v b/inst.v
index 791b600..e0f9153 100644
--- a/inst.v
+++ b/inst.v
@@ -229,3 +229,5 @@
 `define VF         32'b00000_?????_????????????_010_1110011
 `define C_ADDI     32'b00000000000000000000000000000000
 `define C_LI       32'b00000000000000000000000000000000
+`define C_MOVE     32'b00000000000000000000000000000000
+`define C_J        32'b00000000000000000000000000000000
diff --git a/opcodes b/opcodes
index fa5369b..fbc039e 100644
--- a/opcodes
+++ b/opcodes
@@ -317,5 +317,7 @@ setvl       rd       rs1 21..10=0 9..7=1     6..2=0x1C 1..0=3
 vf          31..27=0 rs1 imm12    9..7=2     6..2=0x1C 1..0=3
 
 # compressed instructions
-c.addi cimm6 crd5 4..0=0
-c.li   cimm6 crd5 4..0=1
+c.addi    cimm6  crd 4..0=0
+c.li      cimm6  crd 4..0=1
+c.move 15=0 crs1 crd 4..0=2
+c.j    15=1  cimm10  4..0=2
diff --git a/parse-opcodes b/parse-opcodes
index a266d44..1777104 100755
--- a/parse-opcodes
+++ b/parse-opcodes
@@ -24,8 +24,11 @@ arglut['imm12lo'] = (16,10)
 arglut['shamt'] = (15,10)
 arglut['shamtw'] = (14,10)
 
-arglut['crd5'] = (9,5)
+arglut['crd'] = (9,5)
+arglut['crs2'] = (9,5)
+arglut['crs1'] = (14,10)
 arglut['cimm6'] = (15,10)
+arglut['cimm10'] = (14,5)
 
 typelut = {} # 0=unimp,1=j,2=lui,3=imm,4=r,5=r4,6=ish,7=ishw,10=b
 typelut[0x03] = 3