diff options
| author |  Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-11-09 15:31:00 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-11-21 16:54:35 -0800 |
| commit | 5cab356399c5b7358de571a79aa2aaf060c8a5f4 (patch) | |
| tree | 844669422fd7d2d242dc4c80f99eeecf0658d1a8 | |
| parent | 0b707f09b7cc465505aebac30146932d10a45b6f (diff) | |
[opcodes, pk, sim, xcc] Tweaked FP encoding
| -rw-r--r-- | inst.v | 93 | ||||
| -rw-r--r-- | instr-table.tex | 1326 | ||||
| -rw-r--r-- | opcodes | 107 | ||||
| -rwxr-xr-x | parse-opcodes | 157 |
4 files changed, 682 insertions, 1001 deletions
@@ -86,63 +86,46 @@ `define MFCR 32'b1111011_0010000000_?????_00000_????? `define MTCR 32'b1111011_0010000001_?????_?????_00000 `define SYNC 32'b1111011_0100000000_00000_00000_00000 -`define SYSCALL 32'b1111011_0110000000_00000_00000_00000 +`define SYSCALL 32'b1111011_011_????????????_00000_00000 `define EI 32'b1101011_0000000000_00000_00000_????? `define DI 32'b1101011_0000000001_00000_00000_????? `define MFPCR 32'b1101011_0010000000_?????_00000_????? `define MTPCR 32'b1101011_0010000001_?????_?????_00000 `define ERET 32'b1101011_0100000000_00000_00000_00000 -`define ADD_S 32'b1101010_0000000000_?????_?????_????? -`define SUB_S 32'b1101010_0000000001_?????_?????_????? -`define MUL_S 32'b1101010_0000000010_?????_?????_????? -`define DIV_S 32'b1101010_0000000011_?????_?????_????? -`define SQRT_S 32'b1101010_0000000100_00000_?????_????? +`define ADD_S 32'b1101010_00_???_00000_?????_?????_????? +`define SUB_S 32'b1101010_00_???_00001_?????_?????_????? +`define MUL_S 32'b1101010_00_???_00010_?????_?????_????? +`define DIV_S 32'b1101010_00_???_00011_?????_?????_????? +`define SQRT_S 32'b1101010_00_???_00100_00000_?????_????? `define SGNINJ_S 32'b1101010_0000000101_?????_?????_????? `define SGNINJN_S 32'b1101010_0000000110_?????_?????_????? `define SGNMUL_S 32'b1101010_0000000111_?????_?????_????? -`define ADD_D 32'b1101010_1100000000_?????_?????_????? -`define SUB_D 32'b1101010_1100000001_?????_?????_????? -`define MUL_D 32'b1101010_1100000010_?????_?????_????? -`define DIV_D 32'b1101010_1100000011_?????_?????_????? -`define SQRT_D 32'b1101010_1100000100_00000_?????_????? +`define ADD_D 32'b1101010_11_???_00000_?????_?????_????? +`define SUB_D 32'b1101010_11_???_00001_?????_?????_????? +`define MUL_D 32'b1101010_11_???_00010_?????_?????_????? +`define DIV_D 32'b1101010_11_???_00011_?????_?????_????? +`define SQRT_D 32'b1101010_11_???_00100_00000_?????_????? `define SGNINJ_D 32'b1101010_1100000101_?????_?????_????? `define SGNINJN_D 32'b1101010_1100000110_?????_?????_????? `define SGNMUL_D 32'b1101010_1100000111_?????_?????_????? -`define ADD_S_RM 32'b1101010_001_??_00000_?????_?????_????? -`define SUB_S_RM 32'b1101010_001_??_00001_?????_?????_????? -`define MUL_S_RM 32'b1101010_001_??_00010_?????_?????_????? -`define DIV_S_RM 32'b1101010_001_??_00011_?????_?????_????? -`define SQRT_S_RM 32'b1101010_001_??_00100_00000_?????_????? -`define ADD_D_RM 32'b1101010_111_??_00000_?????_?????_????? -`define SUB_D_RM 32'b1101010_111_??_00001_?????_?????_????? -`define MUL_D_RM 32'b1101010_111_??_00010_?????_?????_????? -`define DIV_D_RM 32'b1101010_111_??_00011_?????_?????_????? -`define SQRT_D_RM 32'b1101010_111_??_00100_00000_?????_????? -`define CVT_L_S_RM 32'b1101010_001_??_01000_00000_?????_????? -`define CVTU_L_S_RM 32'b1101010_001_??_01001_00000_?????_????? -`define CVT_W_S_RM 32'b1101010_001_??_01010_00000_?????_????? -`define CVTU_W_S_RM 32'b1101010_001_??_01011_00000_?????_????? -`define CVT_L_D_RM 32'b1101010_111_??_01000_00000_?????_????? -`define CVTU_L_D_RM 32'b1101010_111_??_01001_00000_?????_????? -`define CVT_W_D_RM 32'b1101010_111_??_01010_00000_?????_????? -`define CVTU_W_D_RM 32'b1101010_111_??_01011_00000_?????_????? -`define CVT_S_L 32'b1101010_0000001100_00000_?????_????? -`define CVTU_S_L 32'b1101010_0000001101_00000_?????_????? -`define CVT_S_W 32'b1101010_0000001110_00000_?????_????? -`define CVTU_S_W 32'b1101010_0000001111_00000_?????_????? -`define CVT_D_L 32'b1101010_1100001100_00000_?????_????? -`define CVTU_D_L 32'b1101010_1100001101_00000_?????_????? +`define CVT_L_S 32'b1101010_00_???_01000_00000_?????_????? +`define CVTU_L_S 32'b1101010_00_???_01001_00000_?????_????? +`define CVT_W_S 32'b1101010_00_???_01010_00000_?????_????? +`define CVTU_W_S 32'b1101010_00_???_01011_00000_?????_????? +`define CVT_L_D 32'b1101010_11_???_01000_00000_?????_????? +`define CVTU_L_D 32'b1101010_11_???_01001_00000_?????_????? +`define CVT_W_D 32'b1101010_11_???_01010_00000_?????_????? +`define CVTU_W_D 32'b1101010_11_???_01011_00000_?????_????? +`define CVT_S_L 32'b1101010_00_???_01100_00000_?????_????? +`define CVTU_S_L 32'b1101010_00_???_01101_00000_?????_????? +`define CVT_S_W 32'b1101010_00_???_01110_00000_?????_????? +`define CVTU_S_W 32'b1101010_00_???_01111_00000_?????_????? +`define CVT_D_L 32'b1101010_11_???_01100_00000_?????_????? +`define CVTU_D_L 32'b1101010_11_???_01101_00000_?????_????? `define CVT_D_W 32'b1101010_1100001110_00000_?????_????? `define CVTU_D_W 32'b1101010_1100001111_00000_?????_????? -`define CVT_S_L_RM 32'b1101010_001_??_01100_00000_?????_????? -`define CVTU_S_L_RM 32'b1101010_001_??_01101_00000_?????_????? -`define CVT_S_W_RM 32'b1101010_001_??_01110_00000_?????_????? -`define CVTU_S_W_RM 32'b1101010_001_??_01111_00000_?????_????? -`define CVT_D_L_RM 32'b1101010_111_??_01100_00000_?????_????? -`define CVTU_D_L_RM 32'b1101010_111_??_01101_00000_?????_????? -`define CVT_S_D 32'b1101010_0000010011_00000_?????_????? +`define CVT_S_D 32'b1101010_00_???_10011_00000_?????_????? `define CVT_D_S 32'b1101010_1100010000_00000_?????_????? -`define CVT_S_D_RM 32'b1101010_001_??_10011_00000_?????_????? `define C_EQ_S 32'b1101010_0000010101_?????_?????_????? `define C_LT_S 32'b1101010_0000010110_?????_?????_????? `define C_LE_S 32'b1101010_0000010111_?????_?????_????? @@ -160,19 +143,11 @@ `define L_D 32'b1101000_011_????????????_?????_????? `define S_S 32'b1101001_010_???????_?????_?????_????? `define S_D 32'b1101001_011_???????_?????_?????_????? -`define MADD_S 32'b1101100_000_00_?????_?????_?????_????? -`define MSUB_S 32'b1101101_000_00_?????_?????_?????_????? -`define NMSUB_S 32'b1101110_000_00_?????_?????_?????_????? -`define NMADD_S 32'b1101111_000_00_?????_?????_?????_????? -`define MADD_D 32'b1101100_110_00_?????_?????_?????_????? -`define MSUB_D 32'b1101101_110_00_?????_?????_?????_????? -`define NMSUB_D 32'b1101110_110_00_?????_?????_?????_????? -`define NMADD_D 32'b1101111_110_00_?????_?????_?????_????? -`define MADD_S_RM 32'b1101100_001_??_?????_?????_?????_????? -`define MSUB_S_RM 32'b1101101_001_??_?????_?????_?????_????? -`define NMSUB_S_RM 32'b1101110_001_??_?????_?????_?????_????? -`define NMADD_S_RM 32'b1101111_001_??_?????_?????_?????_????? -`define MADD_D_RM 32'b1101100_111_??_?????_?????_?????_????? -`define MSUB_D_RM 32'b1101101_111_??_?????_?????_?????_????? -`define NMSUB_D_RM 32'b1101110_111_??_?????_?????_?????_????? -`define NMADD_D_RM 32'b1101111_111_??_?????_?????_?????_????? +`define MADD_S 32'b1101100_00_???_?????_?????_?????_????? +`define MSUB_S 32'b1101101_00_???_?????_?????_?????_????? +`define NMSUB_S 32'b1101110_00_???_?????_?????_?????_????? +`define NMADD_S 32'b1101111_00_???_?????_?????_?????_????? +`define MADD_D 32'b1101100_11_???_?????_?????_?????_????? +`define MSUB_D 32'b1101101_11_???_?????_?????_?????_????? +`define NMSUB_D 32'b1101110_11_???_?????_?????_?????_????? +`define NMADD_D 32'b1101111_11_???_?????_?????_?????_????? diff --git a/instr-table.tex b/instr-table.tex index 4a4479e..e2c4f49 100644 --- a/instr-table.tex +++ b/instr-table.tex @@ -4,456 +4,455 @@ \begin{table}[p] \begin{small} \begin{center} -\begin{tabular}{rcccccccccccl} +\begin{tabular}{rcccccccccl} & \hspace*{0.6in} & -\hspace*{0.2in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.1in} & +\hspace*{0.3in} & \hspace*{0.1in} & +\hspace*{0.2in} & +\hspace*{0.2in} & \hspace*{0.1in} & -\hspace*{0.4in} & -\hspace*{0.1in} & -\hspace*{0.5in} \\ +\hspace*{0.3in} & +\hspace*{0.3in} & +\hspace*{0.3in} \\ & \instbitrange{31}{25} & -\instbitrange{24}{22} & +\instbitrange{24}{23} & +\instbit{22} & \instbitrange{21}{20} & \instbitrange{19}{16} & \instbit{15} & \instbitrange{14}{10} & \instbitrange{9}{5} & \instbitrange{4}{0} \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{jump target} & J-type \\ -\cline{2-9} +\multicolumn{8}{c|}{jump target} & J-type \\ +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{6}{c|}{LUI-immediate} & +\multicolumn{7}{c|}{LUI-immediate} & \multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{4}{c|}{immediate} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{3}{c|}{immed[11:5]} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{4}{c|}{funct10} & +\multicolumn{5}{c|}{funct10} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct5} & +\multicolumn{3}{c|}{funct5} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Unimplemented Instruction} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Unimplemented Instruction} & \\ +\cline{2-10} & -\multicolumn{8}{|c|}{00000000000000000000000000000000} & UNIMP \\ -\cline{2-9} +\multicolumn{9}{|c|}{00000000000000000000000000000000} & UNIMP \\ +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Control Transfer Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Control Transfer Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1100000} & -\multicolumn{7}{c|}{imm25} & J imm25 \\ -\cline{2-9} +\multicolumn{8}{c|}{imm25} & J imm25 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1100001} & -\multicolumn{7}{c|}{imm25} & JAL imm25 \\ -\cline{2-9} +\multicolumn{8}{c|}{imm25} & JAL imm25 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1100010} & -\multicolumn{1}{c|}{000} & +\multicolumn{2}{c|}{000} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & JALR.C rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1100010} & -\multicolumn{1}{c|}{001} & +\multicolumn{2}{c|}{001} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & JALR.R rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1100010} & -\multicolumn{1}{c|}{010} & +\multicolumn{2}{c|}{010} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & JALR.J rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1100011} & -\multicolumn{1}{c|}{000} & +\multicolumn{2}{c|}{000} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BEQ rs1,rs2,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & BEQ rs1,rs2,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1100011} & -\multicolumn{1}{c|}{001} & +\multicolumn{2}{c|}{001} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BNE rs1,rs2,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & BNE rs1,rs2,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1100011} & -\multicolumn{1}{c|}{100} & +\multicolumn{2}{c|}{100} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BLT rs1,rs2,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & BLT rs1,rs2,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1100011} & -\multicolumn{1}{c|}{101} & +\multicolumn{2}{c|}{101} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BGE rs1,rs2,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & BGE rs1,rs2,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1100011} & -\multicolumn{1}{c|}{110} & +\multicolumn{2}{c|}{110} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BLTU rs1,rs2,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & BLTU rs1,rs2,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1100011} & -\multicolumn{1}{c|}{111} & +\multicolumn{2}{c|}{111} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & BGEU rs1,rs2,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & BGEU rs1,rs2,imm12 \\ +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Memory Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Memory Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1111000} & -\multicolumn{1}{c|}{000} & +\multicolumn{2}{c|}{000} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & LB rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111000} & -\multicolumn{1}{c|}{001} & +\multicolumn{2}{c|}{001} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & LH rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111000} & -\multicolumn{1}{c|}{010} & +\multicolumn{2}{c|}{010} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & LW rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111000} & -\multicolumn{1}{c|}{011} & +\multicolumn{2}{c|}{011} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & LD rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111000} & -\multicolumn{1}{c|}{100} & +\multicolumn{2}{c|}{100} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & LBU rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111000} & -\multicolumn{1}{c|}{101} & +\multicolumn{2}{c|}{101} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & LHU rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111000} & -\multicolumn{1}{c|}{110} & +\multicolumn{2}{c|}{110} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & LWU rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111000} & -\multicolumn{1}{c|}{111} & +\multicolumn{2}{c|}{111} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{00000} & SYNCI rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111001} & -\multicolumn{1}{c|}{000} & +\multicolumn{2}{c|}{000} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & SB rs2,rs1,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & SB rs2,rs1,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1111001} & -\multicolumn{1}{c|}{001} & +\multicolumn{2}{c|}{001} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & SH rs2,rs1,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & SH rs2,rs1,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1111001} & -\multicolumn{1}{c|}{010} & +\multicolumn{2}{c|}{010} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & SW rs2,rs1,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & SW rs2,rs1,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1111001} & -\multicolumn{1}{c|}{011} & +\multicolumn{2}{c|}{011} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & SD rs2,rs1,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & SD rs2,rs1,imm12 \\ +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Atomic Memory Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Atomic Memory Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0100000000} & +\multicolumn{5}{c|}{0100000000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMOW.ADD rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0100000001} & +\multicolumn{5}{c|}{0100000001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMOW.SWAP rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0100000010} & +\multicolumn{5}{c|}{0100000010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMOW.AND rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0100000011} & +\multicolumn{5}{c|}{0100000011} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMOW.OR rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0100000100} & +\multicolumn{5}{c|}{0100000100} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMOW.MIN rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0100000101} & +\multicolumn{5}{c|}{0100000101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMOW.MAX rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0100000110} & +\multicolumn{5}{c|}{0100000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMOW.MINU rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0100000111} & +\multicolumn{5}{c|}{0100000111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMOW.MAXU rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0110000000} & +\multicolumn{5}{c|}{0110000000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMO.ADD rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0110000001} & +\multicolumn{5}{c|}{0110000001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMO.SWAP rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0110000010} & +\multicolumn{5}{c|}{0110000010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMO.AND rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0110000011} & +\multicolumn{5}{c|}{0110000011} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMO.OR rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0110000100} & +\multicolumn{5}{c|}{0110000100} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMO.MIN rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0110000101} & +\multicolumn{5}{c|}{0110000101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMO.MAX rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0110000110} & +\multicolumn{5}{c|}{0110000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMO.MINU rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111010} & -\multicolumn{4}{c|}{0110000111} & +\multicolumn{5}{c|}{0110000111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AMO.MAXU rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} \end{tabular} @@ -469,485 +468,484 @@ \begin{table}[p] \begin{small} \begin{center} -\begin{tabular}{rcccccccccccl} +\begin{tabular}{rcccccccccl} & \hspace*{0.6in} & -\hspace*{0.2in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.1in} & +\hspace*{0.3in} & \hspace*{0.1in} & +\hspace*{0.2in} & +\hspace*{0.2in} & \hspace*{0.1in} & -\hspace*{0.4in} & -\hspace*{0.1in} & -\hspace*{0.5in} \\ +\hspace*{0.3in} & +\hspace*{0.3in} & +\hspace*{0.3in} \\ & \instbitrange{31}{25} & -\instbitrange{24}{22} & +\instbitrange{24}{23} & +\instbit{22} & \instbitrange{21}{20} & \instbitrange{19}{16} & \instbit{15} & \instbitrange{14}{10} & \instbitrange{9}{5} & \instbitrange{4}{0} \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{jump target} & J-type \\ -\cline{2-9} +\multicolumn{8}{c|}{jump target} & J-type \\ +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{6}{c|}{LUI-immediate} & +\multicolumn{7}{c|}{LUI-immediate} & \multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{4}{c|}{immediate} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{3}{c|}{immed[11:5]} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{4}{c|}{funct10} & +\multicolumn{5}{c|}{funct10} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct5} & +\multicolumn{3}{c|}{funct5} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Integer Compute Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Integer Compute Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1110001} & -\multicolumn{6}{c|}{imm20} & +\multicolumn{7}{c|}{imm20} & \multicolumn{1}{c|}{rd} & LUI rd,imm20 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{000} & +\multicolumn{2}{c|}{000} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & ADDI rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{010} & +\multicolumn{2}{c|}{010} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SLTI rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{011} & +\multicolumn{2}{c|}{011} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SLTIU rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{100} & +\multicolumn{2}{c|}{100} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & ANDI rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{101} & +\multicolumn{2}{c|}{101} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & ORI rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{110} & +\multicolumn{2}{c|}{110} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & XORI rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{111} & +\multicolumn{2}{c|}{111} & \multicolumn{2}{c|}{000001} & \multicolumn{2}{c|}{shamt} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SLLI rd,rs1,shamt \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{111} & +\multicolumn{2}{c|}{111} & \multicolumn{2}{c|}{000010} & \multicolumn{2}{c|}{shamt} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SRLI rd,rs1,shamt \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110100} & -\multicolumn{1}{c|}{111} & +\multicolumn{2}{c|}{111} & \multicolumn{2}{c|}{000011} & \multicolumn{2}{c|}{shamt} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SRAI rd,rs1,shamt \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0000000000} & +\multicolumn{5}{c|}{0000000000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & ADD rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0000000001} & +\multicolumn{5}{c|}{0000000001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SUB rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0000000010} & +\multicolumn{5}{c|}{0000000010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SLT rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0000000011} & +\multicolumn{5}{c|}{0000000011} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SLTU rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0000000100} & +\multicolumn{5}{c|}{0000000100} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & AND rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0000000101} & +\multicolumn{5}{c|}{0000000101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & OR rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0000000110} & +\multicolumn{5}{c|}{0000000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & XOR rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0000000111} & +\multicolumn{5}{c|}{0000000111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & NOR rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{1110000010} & +\multicolumn{5}{c|}{1110000010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SLL rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{1110000100} & +\multicolumn{5}{c|}{1110000100} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SRL rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{1110000110} & +\multicolumn{5}{c|}{1110000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SRA rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0010000000} & +\multicolumn{5}{c|}{0010000000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MUL rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0010000010} & +\multicolumn{5}{c|}{0010000010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MULH rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0010000011} & +\multicolumn{5}{c|}{0010000011} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MULHU rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0010000100} & +\multicolumn{5}{c|}{0010000100} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & DIV rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0010000101} & +\multicolumn{5}{c|}{0010000101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & DIVU rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0010000110} & +\multicolumn{5}{c|}{0010000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & REM rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110101} & -\multicolumn{4}{c|}{0010000111} & +\multicolumn{5}{c|}{0010000111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & REMU rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf 32-bit Integer Compute Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf 32-bit Integer Compute Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1110110} & -\multicolumn{1}{c|}{000} & +\multicolumn{2}{c|}{000} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & ADDIW rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110110} & -\multicolumn{1}{c|}{111} & +\multicolumn{2}{c|}{111} & \multicolumn{2}{c|}{000001} & \multicolumn{1}{c|}{0} & \multicolumn{1}{c|}{shamtw} & \multicolumn{1}{c|}{rd} & \multicolumn{1}{c|}{rs1} & SLLIW rd,rs1,shamtw \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110110} & -\multicolumn{1}{c|}{111} & +\multicolumn{2}{c|}{111} & \multicolumn{2}{c|}{000010} & \multicolumn{1}{c|}{0} & \multicolumn{1}{c|}{shamtw} & \multicolumn{1}{c|}{rd} & \multicolumn{1}{c|}{rs1} & SRLIW rd,rs1,shamtw \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110110} & -\multicolumn{1}{c|}{111} & +\multicolumn{2}{c|}{111} & \multicolumn{2}{c|}{000011} & \multicolumn{1}{c|}{0} & \multicolumn{1}{c|}{shamtw} & \multicolumn{1}{c|}{rd} & \multicolumn{1}{c|}{rs1} & SRAIW rd,rs1,shamtw \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0000000000} & +\multicolumn{5}{c|}{0000000000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & ADDW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0000000001} & +\multicolumn{5}{c|}{0000000001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SUBW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{1110000010} & +\multicolumn{5}{c|}{1110000010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SLLW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{1110000100} & +\multicolumn{5}{c|}{1110000100} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SRLW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{1110000110} & +\multicolumn{5}{c|}{1110000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SRAW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0010000000} & +\multicolumn{5}{c|}{0010000000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MULW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0010000010} & +\multicolumn{5}{c|}{0010000010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MULHW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0010000011} & +\multicolumn{5}{c|}{0010000011} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MULHUW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0010000100} & +\multicolumn{5}{c|}{0010000100} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & DIVW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0010000101} & +\multicolumn{5}{c|}{0010000101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & DIVUW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0010000110} & +\multicolumn{5}{c|}{0010000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & REMW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1110111} & -\multicolumn{4}{c|}{0010000111} & +\multicolumn{5}{c|}{0010000111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & REMUW rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} \end{tabular} @@ -963,488 +961,317 @@ \begin{table}[p] \begin{small} \begin{center} -\begin{tabular}{rcccccccccccl} +\begin{tabular}{rcccccccccl} & \hspace*{0.6in} & -\hspace*{0.2in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.1in} & -\hspace*{0.1in} & +\hspace*{0.3in} & \hspace*{0.1in} & -\hspace*{0.4in} & +\hspace*{0.2in} & +\hspace*{0.2in} & \hspace*{0.1in} & -\hspace*{0.5in} \\ +\hspace*{0.3in} & +\hspace*{0.3in} & +\hspace*{0.3in} \\ & \instbitrange{31}{25} & -\instbitrange{24}{22} & +\instbitrange{24}{23} & +\instbit{22} & \instbitrange{21}{20} & \instbitrange{19}{16} & \instbit{15} & \instbitrange{14}{10} & \instbitrange{9}{5} & \instbitrange{4}{0} \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{jump target} & J-type \\ -\cline{2-9} +\multicolumn{8}{c|}{jump target} & J-type \\ +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{6}{c|}{LUI-immediate} & +\multicolumn{7}{c|}{LUI-immediate} & \multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{4}{c|}{immediate} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{3}{c|}{immed[11:5]} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{4}{c|}{funct10} & +\multicolumn{5}{c|}{funct10} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct5} & +\multicolumn{3}{c|}{funct5} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Floating-Point Memory Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Floating-Point Memory Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101000} & -\multicolumn{1}{c|}{010} & +\multicolumn{2}{c|}{010} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & L.S rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101000} & -\multicolumn{1}{c|}{011} & +\multicolumn{2}{c|}{011} & \multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & L.D rd,rs1,imm12 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101001} & -\multicolumn{1}{c|}{010} & +\multicolumn{2}{c|}{010} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & S.S rs2,rs1,imm12lo,imm12hi \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & S.S rs2,rs1,imm12 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101001} & -\multicolumn{1}{c|}{011} & +\multicolumn{2}{c|}{011} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{imm12lo} & S.D rs2,rs1,imm12lo,imm12hi \\ -\cline{2-9} - - -& -\multicolumn{11}{c}{} & \\ -& -\multicolumn{11}{c}{\bf Floating-Point Compute Instructions} & \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ADD.S rd,rs1,rs2 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000000001} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SUB.S rd,rs1,rs2 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000000010} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MUL.S rd,rs1,rs2 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000000011} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & DIV.S rd,rs1,rs2 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000000100} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SQRT.S rd,rs1 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100000000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ADD.D rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{1}{c|}{imm12lo} & S.D rs2,rs1,imm12 \\ +\cline{2-10} & -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100000001} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SUB.D rd,rs1,rs2 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100000010} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MUL.D rd,rs1,rs2 \\ -\cline{2-9} - - +\multicolumn{9}{c}{} & \\ & -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100000011} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & DIV.D rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Floating-Point Compute Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100000100} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SQRT.D rd,rs1 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101100} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00000} & -\multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MADD.S rd,rs1,rs2,rs3 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101101} & -\multicolumn{2}{c|}{00000} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MSUB.S rd,rs1,rs2,rs3 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101110} & -\multicolumn{2}{c|}{00000} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NMSUB.S rd,rs1,rs2,rs3 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101111} & -\multicolumn{2}{c|}{00000} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NMADD.S rd,rs1,rs2,rs3 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101100} & -\multicolumn{2}{c|}{11000} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MADD.D rd,rs1,rs2,rs3 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101101} & -\multicolumn{2}{c|}{11000} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MSUB.D rd,rs1,rs2,rs3 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101110} & -\multicolumn{2}{c|}{11000} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NMSUB.D rd,rs1,rs2,rs3 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101111} & -\multicolumn{2}{c|}{11000} & -\multicolumn{2}{c|}{rs3} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NMADD.D rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & ADD.S rd,rs1,rs2[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & -\multicolumn{2}{c|}{00000} & -\multicolumn{1}{c|}{rs2} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ADD.S.RM rd,rs1,rs2 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SUB.S.RM rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & SUB.S rd,rs1,rs2[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MUL.S.RM rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & MUL.S rd,rs1,rs2[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00011} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & DIV.S.RM rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & DIV.S rd,rs1,rs2[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00100} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SQRT.S.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & SQRT.S rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & ADD.D.RM rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & ADD.D rd,rs1,rs2[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SUB.D.RM rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & SUB.D rd,rs1,rs2[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MUL.D.RM rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & MUL.D rd,rs1,rs2[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00011} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & DIV.D.RM rd,rs1,rs2 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & DIV.D rd,rs1,rs2[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{00100} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & SQRT.D.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & SQRT.D rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101100} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MADD.S.RM rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & MADD.S rd,rs1,rs2,rs3[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101101} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MSUB.S.RM rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & MSUB.S rd,rs1,rs2,rs3[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101110} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NMSUB.S.RM rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & NMSUB.S rd,rs1,rs2,rs3[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101111} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NMADD.S.RM rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & NMADD.S rd,rs1,rs2,rs3[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101100} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MADD.D.RM rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & MADD.D rd,rs1,rs2,rs3[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101101} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & MSUB.D.RM rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & MSUB.D rd,rs1,rs2,rs3[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101110} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NMSUB.D.RM rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & NMSUB.D rd,rs1,rs2,rs3[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101111} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & NMADD.D.RM rd,rs1,rs2,rs3 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & NMADD.D rd,rs1,rs2,rs3[,rm] \\ +\cline{2-10} \end{tabular} @@ -1460,461 +1287,397 @@ \begin{table}[p] \begin{small} \begin{center} -\begin{tabular}{rcccccccccccl} +\begin{tabular}{rcccccccccl} & \hspace*{0.6in} & -\hspace*{0.2in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.1in} & -\hspace*{0.1in} & +\hspace*{0.3in} & \hspace*{0.1in} & -\hspace*{0.4in} & +\hspace*{0.2in} & +\hspace*{0.2in} & \hspace*{0.1in} & -\hspace*{0.5in} \\ +\hspace*{0.3in} & +\hspace*{0.3in} & +\hspace*{0.3in} \\ & \instbitrange{31}{25} & -\instbitrange{24}{22} & +\instbitrange{24}{23} & +\instbit{22} & \instbitrange{21}{20} & \instbitrange{19}{16} & \instbit{15} & \instbitrange{14}{10} & \instbitrange{9}{5} & \instbitrange{4}{0} \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{jump target} & J-type \\ -\cline{2-9} +\multicolumn{8}{c|}{jump target} & J-type \\ +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{6}{c|}{LUI-immediate} & +\multicolumn{7}{c|}{LUI-immediate} & \multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{4}{c|}{immediate} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{3}{c|}{immed[11:5]} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{4}{c|}{funct10} & +\multicolumn{5}{c|}{funct10} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct5} & +\multicolumn{3}{c|}{funct5} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Floating-Point Move \& Conversion Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Floating-Point Move \& Conversion Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000000101} & +\multicolumn{5}{c|}{0000000101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SGNINJ.S rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000000110} & +\multicolumn{5}{c|}{0000000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SGNINJN.S rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000000111} & +\multicolumn{5}{c|}{0000000111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SGNMUL.S rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100000101} & +\multicolumn{5}{c|}{1100000101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SGNINJ.D rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100000110} & +\multicolumn{5}{c|}{1100000110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SGNINJN.D rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100000111} & +\multicolumn{5}{c|}{1100000111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & SGNMUL.D rd,rs1,rs2 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000010011} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.S.D rd,rs1 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100010000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.D.S rd,rs1 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{10011} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.S.D.RM rd,rs1 \\ -\cline{2-9} - - -& -\multicolumn{11}{c}{} & \\ -& -\multicolumn{11}{c}{\bf Integer to Floating-Point Move \& Conversion Instructions} & \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.S.D rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000001100} & +\multicolumn{5}{c|}{1100010000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.S.L rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.D.S rd,rs1 \\ +\cline{2-10} & -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000001101} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.S.L rd,rs1 \\ -\cline{2-9} - - +\multicolumn{9}{c}{} & \\ & -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000001110} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.S.W rd,rs1 \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Integer to Floating-Point Move \& Conversion Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000001111} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.S.W rd,rs1 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100001100} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & +\multicolumn{2}{c|}{01100} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.D.L rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.S.L rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100001101} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & +\multicolumn{2}{c|}{01101} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.D.L rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVTU.S.L rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100001110} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & +\multicolumn{2}{c|}{01110} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.D.W rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.S.W rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100001111} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & +\multicolumn{2}{c|}{01111} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.D.W rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVTU.S.W rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01100} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.S.L.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.D.L rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01101} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.S.L.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVTU.D.L rd,rs1[,rm] \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & -\multicolumn{2}{c|}{01110} & +\multicolumn{5}{c|}{1100001110} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.S.W.RM rd,rs1 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & -\multicolumn{2}{c|}{01111} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.S.W.RM rd,rs1 \\ -\cline{2-9} - - -& -\multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & -\multicolumn{2}{c|}{01100} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.D.L.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.D.W rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & -\multicolumn{2}{c|}{01101} & +\multicolumn{5}{c|}{1100001111} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.D.L.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVTU.D.W rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1101111100} & +\multicolumn{5}{c|}{1101111100} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MTFLH.D rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0001011100} & +\multicolumn{5}{c|}{0001011100} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MTF.S rd,rs1 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1101011100} & +\multicolumn{5}{c|}{1101011100} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & MTF.D rd,rs1 \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Floating-Point to Integer Move \& Conversion Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Floating-Point to Integer Move \& Conversion Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.L.S.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.L.S rm,rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01001} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.L.S.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVTU.L.S rm,rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01010} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.W.S.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.W.S rm,rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{00} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01011} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.W.S.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVTU.W.S rm,rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.L.D.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.L.D rm,rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01001} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.L.D.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVTU.L.D rm,rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01010} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVT.W.D.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVT.W.D rm,rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{1}{c|}{111} & -\multicolumn{1}{c|}{rm} & +\multicolumn{1}{c|}{11} & +\multicolumn{2}{c|}{rm} & \multicolumn{2}{c|}{01011} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{rd} & CVTU.W.D.RM rd,rs1 \\ -\cline{2-9} +\multicolumn{1}{c|}{rd} & CVTU.W.D rm,rd,rs1 \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1101011001} & +\multicolumn{5}{c|}{1101011001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & MFFL.D rd,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1101011010} & +\multicolumn{5}{c|}{1101011010} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & MFFH.D rd,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0001011000} & +\multicolumn{5}{c|}{0001011000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & MFF.S rd,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1101011000} & +\multicolumn{5}{c|}{1101011000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & MFF.D rd,rs2 \\ -\cline{2-9} +\cline{2-10} \end{tabular} @@ -1930,233 +1693,232 @@ \begin{table}[p] \begin{small} \begin{center} -\begin{tabular}{rcccccccccccl} +\begin{tabular}{rcccccccccl} & \hspace*{0.6in} & -\hspace*{0.2in} & -\hspace*{0.5in} & -\hspace*{0.5in} & -\hspace*{0.5in} & +\hspace*{0.3in} & \hspace*{0.1in} & +\hspace*{0.2in} & +\hspace*{0.2in} & \hspace*{0.1in} & -\hspace*{0.1in} & -\hspace*{0.4in} & -\hspace*{0.1in} & -\hspace*{0.5in} \\ +\hspace*{0.3in} & +\hspace*{0.3in} & +\hspace*{0.3in} \\ & \instbitrange{31}{25} & -\instbitrange{24}{22} & +\instbitrange{24}{23} & +\instbit{22} & \instbitrange{21}{20} & \instbitrange{19}{16} & \instbit{15} & \instbitrange{14}{10} & \instbitrange{9}{5} & \instbitrange{4}{0} \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{7}{c|}{jump target} & J-type \\ -\cline{2-9} +\multicolumn{8}{c|}{jump target} & J-type \\ +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{6}{c|}{LUI-immediate} & +\multicolumn{7}{c|}{LUI-immediate} & \multicolumn{1}{c|}{rd} & LUI-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{4}{c|}{immediate} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & I-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{1}{c|}{funct3} & +\multicolumn{2}{c|}{funct3} & \multicolumn{3}{c|}{immed[11:5]} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{immed[4:0]} & B-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{4}{c|}{funct10} & +\multicolumn{5}{c|}{funct10} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R-type \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{opcode} & -\multicolumn{2}{c|}{funct5} & +\multicolumn{3}{c|}{funct5} & \multicolumn{2}{c|}{rs3} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & R4-type \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Floating-Point Compare Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Floating-Point Compare Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000010101} & +\multicolumn{5}{c|}{0000010101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & C.EQ.S rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000010110} & +\multicolumn{5}{c|}{0000010110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & C.LT.S rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{0000010111} & +\multicolumn{5}{c|}{0000010111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & C.LE.S rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100010101} & +\multicolumn{5}{c|}{1100010101} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & C.EQ.D rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100010110} & +\multicolumn{5}{c|}{1100010110} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & C.LT.D rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101010} & -\multicolumn{4}{c|}{1100010111} & +\multicolumn{5}{c|}{1100010111} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{rd} & C.LE.D rd,rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Miscellaneous Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Miscellaneous Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1111011} & -\multicolumn{4}{c|}{0000000000} & +\multicolumn{5}{c|}{0000000000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & RDNPC rd \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111011} & -\multicolumn{4}{c|}{0010000000} & +\multicolumn{5}{c|}{0010000000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & MFCR rd,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111011} & -\multicolumn{4}{c|}{0010000001} & +\multicolumn{5}{c|}{0010000001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{00000} & MTCR rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111011} & -\multicolumn{4}{c|}{0100000000} & +\multicolumn{5}{c|}{0100000000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & SYNC \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1111011} & -\multicolumn{4}{c|}{0110000000} & -\multicolumn{1}{c|}{00000} & +\multicolumn{2}{c|}{011} & +\multicolumn{4}{c|}{imm12} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & SYSCALL imm12 \\ -\cline{2-9} +\cline{2-10} & -\multicolumn{11}{c}{} & \\ +\multicolumn{9}{c}{} & \\ & -\multicolumn{11}{c}{\bf Privileged Instructions} & \\ -\cline{2-9} +\multicolumn{9}{c}{\bf Privileged Instructions} & \\ +\cline{2-10} & \multicolumn{1}{|c|}{1101011} & -\multicolumn{4}{c|}{0000000000} & +\multicolumn{5}{c|}{0000000000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & EI rd \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101011} & -\multicolumn{4}{c|}{0000000001} & +\multicolumn{5}{c|}{0000000001} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & DI rd \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101011} & -\multicolumn{4}{c|}{0010000000} & +\multicolumn{5}{c|}{0010000000} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & MFPCR rd,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101011} & -\multicolumn{4}{c|}{0010000001} & +\multicolumn{5}{c|}{0010000001} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{00000} & MTPCR rs1,rs2 \\ -\cline{2-9} +\cline{2-10} & \multicolumn{1}{|c|}{1101011} & -\multicolumn{4}{c|}{0100000000} & +\multicolumn{5}{c|}{0100000000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & ERET \\ -\cline{2-9} +\cline{2-10} \end{tabular} @@ -122,70 +122,48 @@ mfpcr 31..25=0x6B 24..22=1 21..15=0 9..5=0 rd rs2 mtpcr 31..25=0x6B 24..22=1 21..15=1 4..0=0 rs1 rs2 eret 31..25=0x6B 24..22=2 21..15=0 14..0=0 -# 0x7F is reserved for 64-bit-long instructions +# 0x7C-0x7F are reserved for >32b instructions -add.s 31..25=0x6A 24..23=0 22..20=0 19..15=0 rd rs1 rs2 -sub.s 31..25=0x6A 24..23=0 22..20=0 19..15=1 rd rs1 rs2 -mul.s 31..25=0x6A 24..23=0 22..20=0 19..15=2 rd rs1 rs2 -div.s 31..25=0x6A 24..23=0 22..20=0 19..15=3 rd rs1 rs2 -sqrt.s 31..25=0x6A 24..23=0 22..20=0 19..15=4 14..10=0 rd rs1 +add.s 31..25=0x6A 24..23=0 19..15=0 rd rs1 rs2 rm +sub.s 31..25=0x6A 24..23=0 19..15=1 rd rs1 rs2 rm +mul.s 31..25=0x6A 24..23=0 19..15=2 rd rs1 rs2 rm +div.s 31..25=0x6A 24..23=0 19..15=3 rd rs1 rs2 rm +sqrt.s 31..25=0x6A 24..23=0 19..15=4 14..10=0 rd rs1 rm sgninj.s 31..25=0x6A 24..23=0 22..20=0 19..15=5 rd rs1 rs2 sgninjn.s 31..25=0x6A 24..23=0 22..20=0 19..15=6 rd rs1 rs2 sgnmul.s 31..25=0x6A 24..23=0 22..20=0 19..15=7 rd rs1 rs2 -add.d 31..25=0x6A 24..23=3 22..20=0 19..15=0x0 rd rs1 rs2 -sub.d 31..25=0x6A 24..23=3 22..20=0 19..15=0x1 rd rs1 rs2 -mul.d 31..25=0x6A 24..23=3 22..20=0 19..15=0x2 rd rs1 rs2 -div.d 31..25=0x6A 24..23=3 22..20=0 19..15=0x3 rd rs1 rs2 -sqrt.d 31..25=0x6A 24..23=3 22..20=0 19..15=0x4 14..10=0 rd rs1 +add.d 31..25=0x6A 24..23=3 19..15=0x0 rd rs1 rs2 rm +sub.d 31..25=0x6A 24..23=3 19..15=0x1 rd rs1 rs2 rm +mul.d 31..25=0x6A 24..23=3 19..15=0x2 rd rs1 rs2 rm +div.d 31..25=0x6A 24..23=3 19..15=0x3 rd rs1 rs2 rm +sqrt.d 31..25=0x6A 24..23=3 19..15=0x4 14..10=0 rd rs1 rm sgninj.d 31..25=0x6A 24..23=3 22..20=0 19..15=0x5 rd rs1 rs2 sgninjn.d 31..25=0x6A 24..23=3 22..20=0 19..15=0x6 rd rs1 rs2 sgnmul.d 31..25=0x6A 24..23=3 22..20=0 19..15=0x7 rd rs1 rs2 -add.s.rm 31..25=0x6A 24..23=0 22=1 19..15=0 rm rd rs1 rs2 -sub.s.rm 31..25=0x6A 24..23=0 22=1 19..15=1 rm rd rs1 rs2 -mul.s.rm 31..25=0x6A 24..23=0 22=1 19..15=2 rm rd rs1 rs2 -div.s.rm 31..25=0x6A 24..23=0 22=1 19..15=3 rm rd rs1 rs2 -sqrt.s.rm 31..25=0x6A 24..23=0 22=1 19..15=4 14..10=0 rm rd rs1 - -add.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0x0 rm rd rs1 rs2 -sub.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0x1 rm rd rs1 rs2 -mul.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0x2 rm rd rs1 rs2 -div.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0x3 rm rd rs1 rs2 -sqrt.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0x4 14..10=0 rm rd rs1 - -cvt.l.s.rm 31..25=0x6A 24..23=0 22=1 19..15=0x8 14..10=0 rm rd rs1 -cvtu.l.s.rm 31..25=0x6A 24..23=0 22=1 19..15=0x9 14..10=0 rm rd rs1 -cvt.w.s.rm 31..25=0x6A 24..23=0 22=1 19..15=0xA 14..10=0 rm rd rs1 -cvtu.w.s.rm 31..25=0x6A 24..23=0 22=1 19..15=0xB 14..10=0 rm rd rs1 - -cvt.l.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0x8 14..10=0 rm rd rs1 -cvtu.l.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0x9 14..10=0 rm rd rs1 -cvt.w.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0xA 14..10=0 rm rd rs1 -cvtu.w.d.rm 31..25=0x6A 24..23=3 22=1 19..15=0xB 14..10=0 rm rd rs1 - -cvt.s.l 31..25=0x6A 24..23=0 22..20=0 19..15=0xC 14..10=0 rd rs1 -cvtu.s.l 31..25=0x6A 24..23=0 22..20=0 19..15=0xD 14..10=0 rd rs1 -cvt.s.w 31..25=0x6A 24..23=0 22..20=0 19..15=0xE 14..10=0 rd rs1 -cvtu.s.w 31..25=0x6A 24..23=0 22..20=0 19..15=0xF 14..10=0 rd rs1 - -cvt.d.l 31..25=0x6A 24..23=3 22..20=0 19..15=0xC 14..10=0 rd rs1 -cvtu.d.l 31..25=0x6A 24..23=3 22..20=0 19..15=0xD 14..10=0 rd rs1 -cvt.d.w 31..25=0x6A 24..23=3 22..20=0 19..15=0xE 14..10=0 rd rs1 -cvtu.d.w 31..25=0x6A 24..23=3 22..20=0 19..15=0xF 14..10=0 rd rs1 +cvt.l.s 31..25=0x6A 24..23=0 19..15=0x8 14..10=0 rm rd rs1 +cvtu.l.s 31..25=0x6A 24..23=0 19..15=0x9 14..10=0 rm rd rs1 +cvt.w.s 31..25=0x6A 24..23=0 19..15=0xA 14..10=0 rm rd rs1 +cvtu.w.s 31..25=0x6A 24..23=0 19..15=0xB 14..10=0 rm rd rs1 -cvt.s.l.rm 31..25=0x6A 24..23=0 22=1 19..15=0xC 14..10=0 rm rd rs1 -cvtu.s.l.rm 31..25=0x6A 24..23=0 22=1 19..15=0xD 14..10=0 rm rd rs1 -cvt.s.w.rm 31..25=0x6A 24..23=0 22=1 19..15=0xE 14..10=0 rm rd rs1 -cvtu.s.w.rm 31..25=0x6A 24..23=0 22=1 19..15=0xF 14..10=0 rm rd rs1 +cvt.l.d 31..25=0x6A 24..23=3 19..15=0x8 14..10=0 rm rd rs1 +cvtu.l.d 31..25=0x6A 24..23=3 19..15=0x9 14..10=0 rm rd rs1 +cvt.w.d 31..25=0x6A 24..23=3 19..15=0xA 14..10=0 rm rd rs1 +cvtu.w.d 31..25=0x6A 24..23=3 19..15=0xB 14..10=0 rm rd rs1 -cvt.d.l.rm 31..25=0x6A 24..23=3 22=1 19..15=0xC 14..10=0 rm rd rs1 -cvtu.d.l.rm 31..25=0x6A 24..23=3 22=1 19..15=0xD 14..10=0 rm rd rs1 +cvt.s.l 31..25=0x6A 24..23=0 19..15=0xC 14..10=0 rd rs1 rm +cvtu.s.l 31..25=0x6A 24..23=0 19..15=0xD 14..10=0 rd rs1 rm +cvt.s.w 31..25=0x6A 24..23=0 19..15=0xE 14..10=0 rd rs1 rm +cvtu.s.w 31..25=0x6A 24..23=0 19..15=0xF 14..10=0 rd rs1 rm -cvt.s.d 31..25=0x6A 24..23=0 22..20=0 19..15=0x13 14..10=0 rd rs1 -cvt.d.s 31..25=0x6A 24..23=3 22..20=0 19..15=0x10 14..10=0 rd rs1 +cvt.d.l 31..25=0x6A 24..23=3 19..15=0xC 14..10=0 rd rs1 rm +cvtu.d.l 31..25=0x6A 24..23=3 19..15=0xD 14..10=0 rd rs1 rm +cvt.d.w 31..25=0x6A 24..23=3 22..20=0 19..15=0xE 14..10=0 rd rs1 +cvtu.d.w 31..25=0x6A 24..23=3 22..20=0 19..15=0xF 14..10=0 rd rs1 -cvt.s.d.rm 31..25=0x6A 24..23=0 22=1 19..15=0x13 14..10=0 rm rd rs1 +cvt.s.d 31..25=0x6A 24..23=0 19..15=0x13 14..10=0 rd rs1 rm +cvt.d.s 31..25=0x6A 24..23=3 22..20=0 19..15=0x10 14..10=0 rd rs1 c.eq.s 31..25=0x6A 24..23=0 22..20=0 19..15=0x15 rd rs1 rs2 c.lt.s 31..25=0x6A 24..23=0 22..20=0 19..15=0x16 rd rs1 rs2 @@ -209,23 +187,12 @@ l.d 31..25=0x68 24..22=3 rd rs1 imm12 s.s 31..25=0x69 24..22=2 rs2 rs1 imm12lo imm12hi s.d 31..25=0x69 24..22=3 rs2 rs1 imm12lo imm12hi -madd.s 31..25=0x6C 24..23=0 22..20=0 rd rs1 rs2 rs3 -msub.s 31..25=0x6D 24..23=0 22..20=0 rd rs1 rs2 rs3 -nmsub.s 31..25=0x6E 24..23=0 22..20=0 rd rs1 rs2 rs3 -nmadd.s 31..25=0x6F 24..23=0 22..20=0 rd rs1 rs2 rs3 - -madd.d 31..25=0x6C 24..23=3 22..20=0 rd rs1 rs2 rs3 -msub.d 31..25=0x6D 24..23=3 22..20=0 rd rs1 rs2 rs3 -nmsub.d 31..25=0x6E 24..23=3 22..20=0 rd rs1 rs2 rs3 -nmadd.d 31..25=0x6F 24..23=3 22..20=0 rd rs1 rs2 rs3 - -madd.s.rm 31..25=0x6C 24..23=0 22=1 rm rd rs1 rs2 rs3 -msub.s.rm 31..25=0x6D 24..23=0 22=1 rm rd rs1 rs2 rs3 -nmsub.s.rm 31..25=0x6E 24..23=0 22=1 rm rd rs1 rs2 rs3 -nmadd.s.rm 31..25=0x6F 24..23=0 22=1 rm rd rs1 rs2 rs3 - -madd.d.rm 31..25=0x6C 24..23=3 22=1 rm rd rs1 rs2 rs3 -msub.d.rm 31..25=0x6D 24..23=3 22=1 rm rd rs1 rs2 rs3 -nmsub.d.rm 31..25=0x6E 24..23=3 22=1 rm rd rs1 rs2 rs3 -nmadd.d.rm 31..25=0x6F 24..23=3 22=1 rm rd rs1 rs2 rs3 +madd.s 31..25=0x6C 24..23=0 rd rs1 rs2 rs3 rm +msub.s 31..25=0x6D 24..23=0 rd rs1 rs2 rs3 rm +nmsub.s 31..25=0x6E 24..23=0 rd rs1 rs2 rs3 rm +nmadd.s 31..25=0x6F 24..23=0 rd rs1 rs2 rs3 rm +madd.d 31..25=0x6C 24..23=3 rd rs1 rs2 rs3 rm +msub.d 31..25=0x6D 24..23=3 rd rs1 rs2 rs3 rm +nmsub.d 31..25=0x6E 24..23=3 rd rs1 rs2 rs3 rm +nmadd.d 31..25=0x6F 24..23=3 rd rs1 rs2 rs3 rm diff --git a/parse-opcodes b/parse-opcodes index 30273d8..53409ea 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -22,7 +22,7 @@ arglut['imm12lo'] = (4,0) arglut['imm12hi'] = (21,15) arglut['shamt'] = (15,10) arglut['shamtw'] = (14,10) -arglut['rm'] = (21,20) +arglut['rm'] = (22,20) typelut = {} # 0=unimp,1=j,2=lui,3=imm,4=r,5=r4,6=ish,7=ishw,10=b typelut[0x00] = 0 @@ -151,17 +151,18 @@ def str_arg(arg0,arg1,match,arguments): def str_inst(name,arguments): ret = name.upper() + ' ' for idx in range(len(arguments)): - if arguments[idx] != 'rm': - ret = ret + arguments[idx] - if idx != len(arguments)-1: - ret = ret + ',' + ret = ret + arguments[idx] + if idx != len(arguments)-1: + ret = ret + ',' + ret = ret.replace('imm12lo,imm12hi','imm12') + ret = ret.replace(',rm','[,rm]') return ret def print_unimp_type(name,match,arguments): print """ & -\\multicolumn{8}{|c|}{%s} & %s \\\\ -\\cline{2-9} +\\multicolumn{9}{|c|}{%s} & %s \\\\ +\\cline{2-10} """ % \ ( \ '0'*32, \ @@ -172,8 +173,8 @@ def print_j_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{7}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\multicolumn{8}{c|}{%s} & %s \\\\ +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ @@ -185,9 +186,9 @@ def print_lui_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{6}{c|}{%s} & +\\multicolumn{7}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ @@ -200,12 +201,12 @@ def print_b_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{1}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{3}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ @@ -221,11 +222,11 @@ def print_i_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{1}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{4}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ @@ -240,12 +241,12 @@ def print_ish_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{1}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{2}{c|}{%s} & \\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ @@ -261,13 +262,13 @@ def print_ishw_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{1}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{0} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ @@ -283,11 +284,11 @@ def print_r_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{4}{c|}{%s} & +\\multicolumn{5}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ @@ -303,16 +304,16 @@ def print_r_rm_type(name,match,arguments): & \\multicolumn{1}{|c|}{%s} & \\multicolumn{1}{c|}{%s} & -\\multicolumn{1}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ - binary(yank(match,22,3),3), \ + binary(yank(match,23,2),2), \ str_arg('rm','',match,arguments), \ binary(yank(match,15,5),5), \ str_arg('rs2','',match,arguments), \ @@ -325,12 +326,12 @@ def print_r4_type(name,match,arguments): print """ & \\multicolumn{1}{|c|}{%s} & -\\multicolumn{2}{c|}{%s} & +\\multicolumn{3}{c|}{%s} & \\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ @@ -347,16 +348,16 @@ def print_r4_rm_type(name,match,arguments): & \\multicolumn{1}{|c|}{%s} & \\multicolumn{1}{c|}{%s} & -\\multicolumn{1}{c|}{%s} & +\\multicolumn{2}{c|}{%s} & \\multicolumn{2}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & \\multicolumn{1}{c|}{%s} & %s \\\\ -\\cline{2-9} +\\cline{2-10} """ % \ ( \ binary(yank(match,25,7),7), \ - binary(yank(match,22,3),3), \ + binary(yank(match,23,2),2), \ str_arg('rm','',match,arguments), \ str_arg('rs3','',match,arguments), \ str_arg('rs2','',match,arguments), \ @@ -372,77 +373,76 @@ def print_header(): \\begin{table}[p] \\begin{small} \\begin{center} -\\begin{tabular}{rcccccccccccl} +\\begin{tabular}{rcccccccccl} & \\hspace*{0.6in} & -\\hspace*{0.2in} & -\\hspace*{0.5in} & -\\hspace*{0.5in} & -\\hspace*{0.5in} & +\\hspace*{0.3in} & \\hspace*{0.1in} & +\\hspace*{0.2in} & +\\hspace*{0.2in} & \\hspace*{0.1in} & -\\hspace*{0.1in} & -\\hspace*{0.4in} & -\\hspace*{0.1in} & -\\hspace*{0.5in} \\\\ +\\hspace*{0.3in} & +\\hspace*{0.3in} & +\\hspace*{0.3in} \\\\ & \\instbitrange{31}{25} & -\\instbitrange{24}{22} & +\\instbitrange{24}{23} & +\\instbit{22} & \\instbitrange{21}{20} & \\instbitrange{19}{16} & \\instbit{15} & \\instbitrange{14}{10} & \\instbitrange{9}{5} & \\instbitrange{4}{0} \\\\ -\\cline{2-9} +\\cline{2-10} & \\multicolumn{1}{|c|}{opcode} & -\\multicolumn{7}{c|}{jump target} & J-type \\\\ -\\cline{2-9} +\\multicolumn{8}{c|}{jump target} & J-type \\\\ +\\cline{2-10} & \\multicolumn{1}{|c|}{opcode} & -\\multicolumn{6}{c|}{LUI-immediate} & +\\multicolumn{7}{c|}{LUI-immediate} & \\multicolumn{1}{c|}{rd} & LUI-type \\\\ -\\cline{2-9} +\\cline{2-10} & \\multicolumn{1}{|c|}{opcode} & -\\multicolumn{1}{c|}{funct3} & +\\multicolumn{2}{c|}{funct3} & \\multicolumn{4}{c|}{immediate} & \\multicolumn{1}{c|}{rs1} & \\multicolumn{1}{c|}{rd} & I-type \\\\ -\\cline{2-9} +\\cline{2-10} & \\multicolumn{1}{|c|}{opcode} & -\\multicolumn{1}{c|}{funct3} & +\\multicolumn{2}{c|}{funct3} & \\multicolumn{3}{c|}{immed[11:5]} & \\multicolumn{1}{c|}{rs2} & \\multicolumn{1}{c|}{rs1} & \\multicolumn{1}{c|}{immed[4:0]} & B-type \\\\ -\\cline{2-9} +\\cline{2-10} & \\multicolumn{1}{|c|}{opcode} & -\\multicolumn{4}{c|}{funct10} & +\\multicolumn{5}{c|}{funct10} & \\multicolumn{1}{c|}{rs2} & \\multicolumn{1}{c|}{rs1} & \\multicolumn{1}{c|}{rd} & R-type \\\\ -\\cline{2-9} +\\cline{2-10} & \\multicolumn{1}{|c|}{opcode} & -\\multicolumn{2}{c|}{funct5} & +\\multicolumn{3}{c|}{funct5} & \\multicolumn{2}{c|}{rs3} & \\multicolumn{1}{c|}{rs2} & \\multicolumn{1}{c|}{rs1} & \\multicolumn{1}{c|}{rd} & R4-type \\\\ -\\cline{2-9} +\\cline{2-10} """ def print_subtitle(title): print """ & -\\multicolumn{11}{c}{} & \\\\ +\\multicolumn{9}{c}{} & \\\\ & -\\multicolumn{11}{c}{\\bf %s} & \\\\ -\\cline{2-9} +\\multicolumn{9}{c}{\\bf %s} & \\\\ +\\cline{2-10} """ % title def print_footer(caption): @@ -533,24 +533,6 @@ def make_latex_table(): print_insts(-1,'msub.d',-1,-1,-1) print_insts(-1,'nmsub.d',-1,-1,-1) print_insts(-1,'nmadd.d',-1,-1,-1) - print_insts(-1,'add.s.rm',-1,-1,-1) - print_insts(-1,'sub.s.rm',-1,-1,-1) - print_insts(-1,'mul.s.rm',-1,-1,-1) - print_insts(-1,'div.s.rm',-1,-1,-1) - print_insts(-1,'sqrt.s.rm',-1,-1,-1) - print_insts(-1,'add.d.rm',-1,-1,-1) - print_insts(-1,'sub.d.rm',-1,-1,-1) - print_insts(-1,'mul.d.rm',-1,-1,-1) - print_insts(-1,'div.d.rm',-1,-1,-1) - print_insts(-1,'sqrt.d.rm',-1,-1,-1) - print_insts(-1,'madd.s.rm',-1,-1,-1) - print_insts(-1,'msub.s.rm',-1,-1,-1) - print_insts(-1,'nmsub.s.rm',-1,-1,-1) - print_insts(-1,'nmadd.s.rm',-1,-1,-1) - print_insts(-1,'madd.d.rm',-1,-1,-1) - print_insts(-1,'msub.d.rm',-1,-1,-1) - print_insts(-1,'nmsub.d.rm',-1,-1,-1) - print_insts(-1,'nmadd.d.rm',-1,-1,-1) print_footer(0) print_header() @@ -563,7 +545,6 @@ def make_latex_table(): print_insts(-1,'sgnmul.d',-1,-1,-1) print_insts(-1,'cvt.s.d',-1,-1,-1) print_insts(-1,'cvt.d.s',-1,-1,-1) - print_insts(-1,'cvt.s.d.rm',-1,-1,-1) print_subtitle('Integer to Floating-Point Move \& Conversion Instructions') print_insts(-1,'cvt.s.l',-1,-1,-1) print_insts(-1,'cvtu.s.l',-1,-1,-1) @@ -573,24 +554,18 @@ def make_latex_table(): print_insts(-1,'cvtu.d.l',-1,-1,-1) print_insts(-1,'cvt.d.w',-1,-1,-1) print_insts(-1,'cvtu.d.w',-1,-1,-1) - print_insts(-1,'cvt.s.l.rm',-1,-1,-1) - print_insts(-1,'cvtu.s.l.rm',-1,-1,-1) - print_insts(-1,'cvt.s.w.rm',-1,-1,-1) - print_insts(-1,'cvtu.s.w.rm',-1,-1,-1) - print_insts(-1,'cvt.d.l.rm',-1,-1,-1) - print_insts(-1,'cvtu.d.l.rm',-1,-1,-1) print_insts(-1,'mtflh.d',-1,-1,-1) print_insts(-1,'mtf.s',-1,-1,-1) print_insts(-1,'mtf.d',-1,-1,-1) print_subtitle('Floating-Point to Integer Move \& Conversion Instructions') - print_insts(-1,'cvt.l.s.rm',-1,-1,-1) - print_insts(-1,'cvtu.l.s.rm',-1,-1,-1) - print_insts(-1,'cvt.w.s.rm',-1,-1,-1) - print_insts(-1,'cvtu.w.s.rm',-1,-1,-1) - print_insts(-1,'cvt.l.d.rm',-1,-1,-1) - print_insts(-1,'cvtu.l.d.rm',-1,-1,-1) - print_insts(-1,'cvt.w.d.rm',-1,-1,-1) - print_insts(-1,'cvtu.w.d.rm',-1,-1,-1) + print_insts(-1,'cvt.l.s',-1,-1,-1) + print_insts(-1,'cvtu.l.s',-1,-1,-1) + print_insts(-1,'cvt.w.s',-1,-1,-1) + print_insts(-1,'cvtu.w.s',-1,-1,-1) + print_insts(-1,'cvt.l.d',-1,-1,-1) + print_insts(-1,'cvtu.l.d',-1,-1,-1) + print_insts(-1,'cvt.w.d',-1,-1,-1) + print_insts(-1,'cvtu.w.d',-1,-1,-1) print_insts(-1,'mffl.d',-1,-1,-1) print_insts(-1,'mffh.d',-1,-1,-1) print_insts(-1,'mff.s',-1,-1,-1) @@ -710,7 +685,7 @@ def print_verilog_r4_rm_type(name,match,arguments): ( \ name.replace('.','_').upper(), \ binary(yank(match,25,7),7), \ - binary(yank(match,22,3),3), \ + binary(yank(match,23,2),2), \ str_verilog_arg('rm','',match,arguments), \ str_verilog_arg('rs3','',match,arguments), \ str_verilog_arg('rs2','',match,arguments), \ @@ -723,7 +698,7 @@ def print_verilog_r_rm_type(name,match,arguments): ( \ name.replace('.','_').upper(), \ binary(yank(match,25,7),7), \ - binary(yank(match,22,3),3), \ + binary(yank(match,23,2),2), \ str_verilog_arg('rm','',match,arguments), \ binary(yank(match,15,5),5), \ str_verilog_arg('rs2','',match,arguments), \ @@ -823,6 +798,8 @@ for line in sys.stdin: types[name] = typelut[yank(mymatch,25,7)] if 'shamtw' in arguments[name]: types[name] = 7 + elif 'imm12' in arguments[name]: + types[name] = 3 elif 'shamt' in arguments[name]: types[name] = 6 elif types[name] == 5 and 'rm' in arguments[name]: |