opcodes cleanup

3 files changed, 12 insertions, 14 deletions

diff --git a/inst.v b/inst.v
index 3dde9f4..d0bb9f9 100644
--- a/inst.v
+++ b/inst.v
@@ -108,7 +108,6 @@
 `define VENQIMM2   32'b00000_?????_?????_1000000010_1111011
 `define VENQCNT    32'b00000_?????_?????_1000000011_1111011
 `define VWAITXCPT  32'b00000_00000_00000_1100000000_1111011
-`define VWAITKILL  32'b00000_00000_00000_1100000001_1111011
 `define FADD_S     32'b?????_?????_?????_00000_???_00_1010011
 `define FSUB_S     32'b?????_?????_?????_00001_???_00_1010011
 `define FMUL_S     32'b?????_?????_?????_00010_???_00_1010011
@@ -153,8 +152,8 @@
 `define FMAX_S     32'b?????_?????_?????_11001_000_00_1010011
 `define FMIN_D     32'b?????_?????_?????_11000_000_01_1010011
 `define FMAX_D     32'b?????_?????_?????_11001_000_01_1010011
-`define MFTX_S     32'b?????_00000_?????_11100_000_00_1010011
-`define MFTX_D     32'b?????_00000_?????_11100_000_01_1010011
+`define MFTX_S     32'b?????_?????_00000_11100_000_00_1010011
+`define MFTX_D     32'b?????_?????_00000_11100_000_01_1010011
 `define MFFSR      32'b?????_00000_00000_11101_000_00_1010011
 `define MXTF_S     32'b?????_?????_00000_11110_000_00_1010011
 `define MXTF_D     32'b?????_?????_00000_11110_000_01_1010011
diff --git a/instr-table.tex b/instr-table.tex
index 241c769..d693294 100644
--- a/instr-table.tex
+++ b/instr-table.tex
@@ -1749,23 +1749,23 @@
 
 &
 \multicolumn{1}{|c|}{rd} &
+\multicolumn{1}{c|}{rs1} &
 \multicolumn{1}{c|}{00000} &
-\multicolumn{1}{c|}{rs2} &
 \multicolumn{3}{c|}{11100} &
 \multicolumn{2}{c|}{000} &
 \multicolumn{1}{c|}{00} &
-\multicolumn{1}{c|}{1010011} & MFTX.S rd,rs2 \\
+\multicolumn{1}{c|}{1010011} & MFTX.S rd,rs1 \\
 \cline{2-11}
   
 
 &
 \multicolumn{1}{|c|}{rd} &
+\multicolumn{1}{c|}{rs1} &
 \multicolumn{1}{c|}{00000} &
-\multicolumn{1}{c|}{rs2} &
 \multicolumn{3}{c|}{11100} &
 \multicolumn{2}{c|}{000} &
 \multicolumn{1}{c|}{01} &
-\multicolumn{1}{c|}{1010011} & MFTX.D rd,rs2 \\
+\multicolumn{1}{c|}{1010011} & MFTX.D rd,rs1 \\
 \cline{2-11}
   
 
diff --git a/opcodes b/opcodes
index 5351f1a..99785a1 100644
--- a/opcodes
+++ b/opcodes
@@ -138,7 +138,6 @@ venqimm1  31..27=0 rs1      rs2      16..7=0x201 6..2=0x1E 1..0=3
 venqimm2  31..27=0 rs1      rs2      16..7=0x202 6..2=0x1E 1..0=3
 venqcnt   31..27=0 rs1      rs2      16..7=0x203 6..2=0x1E 1..0=3
 vwaitxcpt 31..27=0 26..22=0 21..17=0 16..7=0x300 6..2=0x1E 1..0=3
-vwaitkill 31..27=0 26..22=0 21..17=0 16..7=0x301 6..2=0x1E 1..0=3
 
 # 0x7C-0x7F are reserved for >32b instructions
 
@@ -197,12 +196,12 @@ fmax.s    rd rs1 rs2      16..12=0x19 11..9=0 8..7=0 6..2=0x14 1..0=3
 fmin.d    rd rs1 rs2      16..12=0x18 11..9=0 8..7=1 6..2=0x14 1..0=3
 fmax.d    rd rs1 rs2      16..12=0x19 11..9=0 8..7=1 6..2=0x14 1..0=3
 
-mftx.s      rd 26..22=0  rs2      16..12=0x1C 11..9=0 8..7=0 6..2=0x14 1..0=3
-mftx.d      rd 26..22=0  rs2      16..12=0x1C 11..9=0 8..7=1 6..2=0x14 1..0=3
-mffsr       rd 26..22=0  21..17=0 16..12=0x1D 11..9=0 8..7=0 6..2=0x14 1..0=3
-mxtf.s      rd       rs1 21..17=0 16..12=0x1E 11..9=0 8..7=0 6..2=0x14 1..0=3
-mxtf.d      rd       rs1 21..17=0 16..12=0x1E 11..9=0 8..7=1 6..2=0x14 1..0=3
-mtfsr       rd       rs1 21..17=0 16..12=0x1F 11..9=0 8..7=0 6..2=0x14 1..0=3
+mftx.s      rd rs1      21..17=0 16..12=0x1C 11..9=0 8..7=0 6..2=0x14 1..0=3
+mftx.d      rd rs1      21..17=0 16..12=0x1C 11..9=0 8..7=1 6..2=0x14 1..0=3
+mffsr       rd 26..22=0 21..17=0 16..12=0x1D 11..9=0 8..7=0 6..2=0x14 1..0=3
+mxtf.s      rd rs1      21..17=0 16..12=0x1E 11..9=0 8..7=0 6..2=0x14 1..0=3
+mxtf.d      rd rs1      21..17=0 16..12=0x1E 11..9=0 8..7=1 6..2=0x14 1..0=3
+mtfsr       rd rs1      21..17=0 16..12=0x1F 11..9=0 8..7=0 6..2=0x14 1..0=3
 
 flw        rd rs1 imm12 9..7=2 6..2=0x01 1..0=3
 fld        rd rs1 imm12 9..7=3 6..2=0x01 1..0=3