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| author |  Stephen Twigg <sdtwigg@eecs.berkeley.edu> | 2014-04-03 16:20:41 -0700 |
|---|---|---|
| committer | Stephen Twigg <sdtwigg@eecs.berkeley.edu> | 2014-04-03 16:20:41 -0700 |
| commit | 04e3614f776c9721114ca451a3c71612085877dc (patch) | |
| tree | 40811dae59d5706db62beeb8edb69442e89fcf8d | |
| parent | 16237298565dc2aec4d153b81581649e5485490c (diff) | |
Move stats register
| -rw-r--r-- | inst.chisel | 4 | ||||
| -rwxr-xr-x | parse-opcodes | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/inst.chisel b/inst.chisel index 455ca08..b9454d3 100644 --- a/inst.chisel +++ b/inst.chisel @@ -216,6 +216,7 @@ object CSRs { val fflags = 0x1 val frm = 0x2 val fcsr = 0x3 + val stats = 0xc0 val sup0 = 0x500 val sup1 = 0x501 val epc = 0x502 @@ -232,7 +233,6 @@ object CSRs { val fatc = 0x50d val send_ipi = 0x50e val clear_ipi = 0x50f - val stats = 0x51c val reset = 0x51d val tohost = 0x51e val fromhost = 0x51f @@ -264,6 +264,7 @@ object CSRs { res += fflags res += frm res += fcsr + res += stats res += sup0 res += sup1 res += epc @@ -280,7 +281,6 @@ object CSRs { res += fatc res += send_ipi res += clear_ipi - res += stats res += reset res += tohost res += fromhost diff --git a/parse-opcodes b/parse-opcodes index 68b2767..86f8c18 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -60,6 +60,7 @@ csrs = [ (0x001, 'fflags'), (0x002, 'frm'), (0x003, 'fcsr'), + (0x0C0, 'stats'), # XXX (0x500, 'sup0'), (0x501, 'sup1'), (0x502, 'epc'), @@ -76,7 +77,6 @@ csrs = [ (0x50D, 'fatc'), (0x50E, 'send_ipi'), (0x50F, 'clear_ipi'), - (0x51C, 'stats'), # XXX (0x51D, 'reset'), (0x51E, 'tohost'), (0x51F, 'fromhost'), |