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| author |  xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2014-07-29 13:42:11 +0000 |
|---|---|---|
| committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2014-07-29 13:42:11 +0000 |
| commit | 769589fb4f72edf46c16a396de6777d8e2fbb9bf (patch) | |
| tree | 433505a6dba47631170d815945d2782bbc56a264 /runtime/arm/i64_sar.S | |
| parent | 21e269ee37b934428306f53dda0495fee30dd8fa (diff) | |
configure: distinguish between ABI and processor model.
ARM: various tweaks, incl. support for SDIV and UDIV insns when available.
test/regression/funptr2.c: Thumb does weird things with <function ptr>+1.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2555 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'runtime/arm/i64_sar.S')
| -rw-r--r-- | runtime/arm/i64_sar.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/runtime/arm/i64_sar.S b/runtime/arm/i64_sar.S index 1bbd8a7..a4d0a1d 100644 --- a/runtime/arm/i64_sar.S +++ b/runtime/arm/i64_sar.S @@ -44,7 +44,7 @@ FUNCTION(__i64_sar) ble 1f @ branch if <= 0, namely if amount >= 32 LSR r0, r0, r2 LSL r3, r1, r3 - ORR r0, r1, r3 + ORR r0, r0, r3 ASR r1, r1, r2 bx lr 1: |