configure: distinguish between ABI and processor model.

ARM: various tweaks, incl. support for SDIV and UDIV insns when available.
test/regression/funptr2.c: Thumb does weird things with <function ptr>+1.


git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2555 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e

10 files changed, 25 insertions, 12 deletions

diff --git a/runtime/Makefile b/runtime/Makefile
index 0cdfd3b..1f0ccf2 100644
--- a/runtime/Makefile
+++ b/runtime/Makefile
@@ -22,7 +22,7 @@ $(LIB): $(OBJS)
 	$(CASMRUNTIME) -o $@ $^
 
 %.o: $(ARCH)/%.S
-	$(CASMRUNTIME) -DVARIANT_$(VARIANT) -DSYS_$(SYSTEM) -o $@ $^
+	$(CASMRUNTIME) -DMODEL_$(MODEL) -DABI_$(ABI) -DSYS_$(SYSTEM) -o $@ $^
 
 clean::
 	rm -f *.o $(LIB)
diff --git a/runtime/arm/i64_dtos.S b/runtime/arm/i64_dtos.S
index 638a5ff..4557eea 100644
--- a/runtime/arm/i64_dtos.S
+++ b/runtime/arm/i64_dtos.S
@@ -39,7 +39,7 @@
 @@@ Conversion from double float to signed 64-bit integer
 	
 FUNCTION(__i64_dtos)
-#ifndef VARIANT_eabi
+#ifndef ABI_eabi
 	vmov r0, r1, d0
 #endif	
         ASR r12, r1, #31       @ save sign of result in r12
diff --git a/runtime/arm/i64_dtou.S b/runtime/arm/i64_dtou.S
index 1c632d2..5764190 100644
--- a/runtime/arm/i64_dtou.S
+++ b/runtime/arm/i64_dtou.S
@@ -39,7 +39,7 @@
 @@@ Conversion from double float to unsigned 64-bit integer	
 
 FUNCTION(__i64_dtou)
-#ifndef VARIANT_eabi
+#ifndef ABI_eabi
 	vmov r0, r1, d0
 #endif	
         cmp r1, #0              @ is double < 0 ?
diff --git a/runtime/arm/i64_sar.S b/runtime/arm/i64_sar.S
index 1bbd8a7..a4d0a1d 100644
--- a/runtime/arm/i64_sar.S
+++ b/runtime/arm/i64_sar.S
@@ -44,7 +44,7 @@ FUNCTION(__i64_sar)
         ble 1f                  @ branch if <= 0, namely if amount >= 32
         LSR r0, r0, r2
 	LSL r3, r1, r3
-        ORR r0, r1, r3
+        ORR r0, r0, r3
         ASR r1, r1, r2
         bx lr
 1:
diff --git a/runtime/arm/i64_stod.S b/runtime/arm/i64_stod.S
index 81e43e2..e38b466 100644
--- a/runtime/arm/i64_stod.S
+++ b/runtime/arm/i64_stod.S
@@ -46,7 +46,7 @@ __i64_stod:
         vcvt.f64.s32 d1, s2     @ convert high half to double (signed)
         vldr    d2, .LC1        @ d2 = 2^32
         vmla.f64 d0, d1, d2     @ d0 = d0 + d1 * d2 = double value of int64
-#ifdef VARIANT_eabi	
+#ifdef ABI_eabi	
 	vmov	r0, r1, d0      @ return result in r0, r1
 #endif
         bx lr
diff --git a/runtime/arm/i64_stof.S b/runtime/arm/i64_stof.S
index f1051f5..bb5e05c 100644
--- a/runtime/arm/i64_stof.S
+++ b/runtime/arm/i64_stof.S
@@ -66,7 +66,7 @@ FUNCTION(__i64_stof)
         vmla.f64 d0, d1, d2     @ d0 = d0 + d1 * d2 = double value of int64
    @ Round to single
         vcvt.f32.f64 s0, d0
-#ifdef VARIANT_eabi	
+#ifdef ABI_eabi	
    @ Return result in r0
 	vmov r0, s0
 #endif	
diff --git a/runtime/arm/i64_utod.S b/runtime/arm/i64_utod.S
index b12d7c2..b4c3075 100644
--- a/runtime/arm/i64_utod.S
+++ b/runtime/arm/i64_utod.S
@@ -46,7 +46,7 @@ __i64_stod:
         vcvt.f64.u32 d1, s2     @ convert high half to double (unsigned)
         vldr    d2, .LC1        @ d2 = 2^32
         vmla.f64 d0, d1, d2     @ d0 = d0 + d1 * d2 = double value of int64
-#ifdef VARIANT_eabi	
+#ifdef ABI_eabi	
 	vmov	r0, r1, d0      @ return result in r0, r1
 #endif
         bx lr
diff --git a/runtime/arm/i64_utof.S b/runtime/arm/i64_utof.S
index 711cda0..fbd325c 100644
--- a/runtime/arm/i64_utof.S
+++ b/runtime/arm/i64_utof.S
@@ -62,7 +62,7 @@ FUNCTION(__i64_utof)
         vmla.f64 d0, d1, d2     @ d0 = d0 + d1 * d2 = double value of int64
    @ Round to single
         vcvt.f32.f64 s0, d0
-#ifdef VARIANT_eabi	
+#ifdef ABI_eabi	
    @ Return result in r0
 	vmov r0, s0
 #endif	
diff --git a/runtime/arm/sysdeps.h b/runtime/arm/sysdeps.h
index b72af0f..85404cf 100644
--- a/runtime/arm/sysdeps.h
+++ b/runtime/arm/sysdeps.h
@@ -34,6 +34,13 @@
 
 // System dependencies
 
+#if defined(MODEL_armv7r)
+// Thumb2-only
+#define THUMB
+#else
+#undef THUMB
+#endif
+
 #ifdef THUMB
 #define FUNCTION(f) \
 	.text; \
@@ -76,9 +83,15 @@ f:
 #define SUB THUMB_S(sub)
 
 	.syntax unified
-#ifdef THUMB
-	.arch	armv7
+#if defined(MODEL_armv6)
+        .arch   armv6
+#elif defined(MODEL_armv7a)
+        .arch   armv7-a
+#elif defined(MODEL_armv7r)
+        .arch   armv7-r
+#elif defined(MODEL_armv7m)
+        .arch   armv7-m
 #else
-	.arch	armv6
+        .arch   armv7
 #endif
 	.fpu	vfpv2
diff --git a/runtime/arm/vararg.S b/runtime/arm/vararg.S
index e352582..ae06e36 100644
--- a/runtime/arm/vararg.S
+++ b/runtime/arm/vararg.S
@@ -67,7 +67,7 @@ FUNCTION(__compcert_va_float64)
         ADD     r1, r1, #15     @ 8-align and advance by 8
         BIC     r1, r1, #7
         str     r1, [r0, #0]    @ update ap
-#ifdef VARIANT_eabi
+#ifdef ABI_eabi
         ldr     r0, [r1, #-8]   @ load next argument and return it in r0,r1
         ldr     r1, [r1, #-4]
 #else