diff options
| author |  aroulin <andy.roulin@epfl.ch> | 2015-08-10 18:21:34 +0200 |
|---|---|---|
| committer | aroulin <andy.roulin@epfl.ch> | 2015-08-11 12:48:28 +0200 |
| commit | 38c87733d9992927135e619d8710ed04785fdb5d (patch) | |
| tree | 66d6b12711893aec8d769bae411490d644c60825 /src/core/arm/disassembler/arm_disasm.h | |
| parent | 4a1db13072764f464db5217c6481b87074963d87 (diff) | |
arm_disasm: ARMv6 mul/div and abs media instructions
SMLAD, SMUAD, SMLSD, SMUSD, SMLALD, SMLSLD,
SMMLA, SMMUL, SMMLS
USAD8, USADA8
Diffstat (limited to 'src/core/arm/disassembler/arm_disasm.h')
| -rw-r--r-- | src/core/arm/disassembler/arm_disasm.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/core/arm/disassembler/arm_disasm.h b/src/core/arm/disassembler/arm_disasm.h index c1bd1b94..259a7786 100644 --- a/src/core/arm/disassembler/arm_disasm.h +++ b/src/core/arm/disassembler/arm_disasm.h @@ -73,8 +73,17 @@ enum Opcode { OP_SHSAX, OP_SHSUB16, OP_SHSUB8, + OP_SMLAD, OP_SMLAL, + OP_SMLALD, + OP_SMLSD, + OP_SMLSLD, + OP_SMMLA, + OP_SMMLS, + OP_SMMUL, + OP_SMUAD, OP_SMULL, + OP_SMUSD, OP_SSAT, OP_SSAT16, OP_SSAX, @@ -120,6 +129,8 @@ enum Opcode { OP_UQSAX, OP_UQSUB16, OP_UQSUB8, + OP_USAD8, + OP_USADA8, OP_USAT, OP_USAT16, OP_USAX, @@ -193,6 +204,7 @@ class ARM_Disasm { static Opcode DecodePackingSaturationReversal(uint32_t insn); static Opcode DecodeMUL(uint32_t insn); static Opcode DecodeMSRImmAndHints(uint32_t insn); + static Opcode DecodeMediaMulDiv(uint32_t insn); static Opcode DecodeMedia(uint32_t insn); static Opcode DecodeLDRH(uint32_t insn); static Opcode DecodeALU(uint32_t insn); @@ -202,6 +214,7 @@ class ARM_Disasm { static std::string DisassembleBX(uint32_t insn); static std::string DisassembleBKPT(uint32_t insn); static std::string DisassembleCLZ(uint32_t insn); + static std::string DisassembleMediaMulDiv(Opcode opcode, uint32_t insn); static std::string DisassembleMemblock(Opcode opcode, uint32_t insn); static std::string DisassembleMem(uint32_t insn); static std::string DisassembleMemHalf(uint32_t insn); |