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-rw-r--r--tensorflow/core/kernels/shape_ops.cc37
1 files changed, 37 insertions, 0 deletions
diff --git a/tensorflow/core/kernels/shape_ops.cc b/tensorflow/core/kernels/shape_ops.cc
index 7ff812cf27..496865de02 100644
--- a/tensorflow/core/kernels/shape_ops.cc
+++ b/tensorflow/core/kernels/shape_ops.cc
@@ -210,6 +210,43 @@ REGISTER_KERNEL_BUILDER(Name("ShapeN")
ShapeNOp<int64>);
#endif
+#if TENSORFLOW_USE_SYCL
+#define REGISTER_SYCL_KERNEL(type) \
+ REGISTER_KERNEL_BUILDER(Name("ShapeN") \
+ .Device(DEVICE_SYCL) \
+ .HostMemory("output") \
+ .TypeConstraint<int32>("out_type") \
+ .TypeConstraint<type>("T"), \
+ ShapeNOp<int32>); \
+ REGISTER_KERNEL_BUILDER(Name("ShapeN") \
+ .Device(DEVICE_SYCL) \
+ .HostMemory("output") \
+ .TypeConstraint<int64>("out_type") \
+ .TypeConstraint<type>("T"), \
+ ShapeNOp<int64>)
+
+TF_CALL_NUMBER_TYPES_NO_INT32(REGISTER_SYCL_KERNEL);
+#undef REGISTER_SYCL_KERNEL
+
+// A special GPU kernel for int32.
+// TODO(b/25387198): Also enable int32 in device memory. This kernel
+// registration requires all int32 inputs and outputs to be in host memory.
+REGISTER_KERNEL_BUILDER(Name("ShapeN")
+ .Device(DEVICE_SYCL)
+ .HostMemory("input")
+ .HostMemory("output")
+ .TypeConstraint<int32>("T")
+ .TypeConstraint<int32>("out_type"),
+ ShapeNOp<int32>);
+REGISTER_KERNEL_BUILDER(Name("ShapeN")
+ .Device(DEVICE_SYCL)
+ .HostMemory("input")
+ .HostMemory("output")
+ .TypeConstraint<int32>("T")
+ .TypeConstraint<int64>("out_type"),
+ ShapeNOp<int64>);
+#endif // TENSORFLOW_USE_SYCL
+
class RankOp : public OpKernel {
public:
explicit RankOp(OpKernelConstruction* ctx) : OpKernel(ctx) {}