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Diffstat (limited to 'tensorflow/core/kernels/maxpooling_op.cc')
-rw-r--r--tensorflow/core/kernels/maxpooling_op.cc47
1 files changed, 16 insertions, 31 deletions
diff --git a/tensorflow/core/kernels/maxpooling_op.cc b/tensorflow/core/kernels/maxpooling_op.cc
index 157ce106ce..e2cf605811 100644
--- a/tensorflow/core/kernels/maxpooling_op.cc
+++ b/tensorflow/core/kernels/maxpooling_op.cc
@@ -20,6 +20,7 @@ limitations under the License.
#include "tensorflow/core/kernels/maxpooling_op.h"
#include <vector>
+#include "third_party/eigen3/unsupported/Eigen/CXX11/Tensor"
#include "tensorflow/core/common_runtime/device.h"
#include "tensorflow/core/framework/numeric_op.h"
#include "tensorflow/core/framework/op_kernel.h"
@@ -33,11 +34,9 @@ limitations under the License.
#include "tensorflow/core/kernels/pooling_ops_common.h"
#include "tensorflow/core/lib/core/errors.h"
#include "tensorflow/core/lib/gtl/array_slice.h"
-#include "tensorflow/core/util/env_var.h"
#include "tensorflow/core/util/padding.h"
#include "tensorflow/core/util/tensor_format.h"
#include "tensorflow/core/util/use_cudnn.h"
-#include "third_party/eigen3/unsupported/Eigen/CXX11/Tensor"
#if GOOGLE_CUDA
#include "tensorflow/core/kernels/maxpooling_op_gpu.h"
@@ -359,7 +358,6 @@ class MaxPoolingGradOp<Eigen::GpuDevice, T> : public OpKernel {
OP_REQUIRES_OK(context, context->GetAttr("padding", &padding_));
use_dnn_ = CanUseCudnn();
- ReadBoolFromEnvVar("TF_ENABLE_MAXPOOL_NANPROP", false, &propagate_nans_);
}
void Compute(OpKernelContext* context) override {
@@ -407,7 +405,7 @@ class MaxPoolingGradOp<Eigen::GpuDevice, T> : public OpKernel {
DnnPoolingGradOp<T>::Compute(
context, perftools::gputools::dnn::PoolingMode::kMaximum, ksize,
stride, padding_, data_format_, &tensor_in, &tensor_out, out_backprop,
- output_shape, propagate_nans_);
+ output_shape);
} else {
CHECK(data_format_ == FORMAT_NHWC)
<< "Non-Cudnn MaxPoolGrad only supports NHWC format";
@@ -422,7 +420,6 @@ class MaxPoolingGradOp<Eigen::GpuDevice, T> : public OpKernel {
Padding padding_;
TensorFormat data_format_;
bool use_dnn_;
- bool propagate_nans_;
};
#endif // GOOGLE_CUDA
@@ -887,8 +884,6 @@ class MaxPoolingWithArgmaxOp : public OpKernel {
OP_REQUIRES(context, ksize_[0] == 1 && stride_[0] == 1,
errors::Unimplemented(
"Pooling is not yet supported on the batch dimension."));
-
- ReadBoolFromEnvVar("TF_ENABLE_MAXPOOL_NANPROP", false, &propagate_nans_);
}
void Compute(OpKernelContext* context) override {
@@ -907,15 +902,14 @@ class MaxPoolingWithArgmaxOp : public OpKernel {
Tensor* argmax = nullptr;
OP_REQUIRES_OK(context, context->allocate_output(1, out_shape, &argmax));
- LaunchMaxPoolingWithArgmax<Device, T>::launch(
- context, params, tensor_in, output, argmax, propagate_nans_);
+ LaunchMaxPoolingWithArgmax<Device, T>::launch(context, params, tensor_in,
+ output, argmax);
}
private:
std::vector<int32> ksize_;
std::vector<int32> stride_;
Padding padding_;
- bool propagate_nans_;
};
template <typename Device, typename T>
@@ -1051,8 +1045,6 @@ class MaxPoolingNoMaskOp<GPUDevice, T> : public OpKernel {
errors::Unimplemented(
"Pooling is not yet supported on the batch dimension."));
use_dnn_ = CanUseCudnn();
-
- ReadBoolFromEnvVar("TF_ENABLE_MAXPOOL_NANPROP", false, &propagate_nans_);
}
void Compute(OpKernelContext* context) override {
@@ -1076,10 +1068,9 @@ class MaxPoolingNoMaskOp<GPUDevice, T> : public OpKernel {
// These is_int8x4 checks avoid linker errors for missing qint8 kernels.
if (!is_int8x4 && use_dnn_ && data_format_ == FORMAT_NCHW) {
- DnnPoolingOp<T>::Compute(context,
- perftools::gputools::dnn::PoolingMode::kMaximum,
- ksize_, stride_, padding_, data_format_,
- tensor_in, out_shape, propagate_nans_);
+ DnnPoolingOp<T>::Compute(
+ context, perftools::gputools::dnn::PoolingMode::kMaximum, ksize_,
+ stride_, padding_, data_format_, tensor_in, out_shape);
} else {
Tensor* output = nullptr;
OP_REQUIRES_OK(context, context->allocate_output(0, out_shape, &output));
@@ -1088,7 +1079,7 @@ class MaxPoolingNoMaskOp<GPUDevice, T> : public OpKernel {
tensor_in, output);
} else if (data_format_ == FORMAT_NHWC) {
LaunchMaxPoolingNoMask<Device, T>::launch(context, params, tensor_in,
- output, propagate_nans_);
+ output);
} else {
LOG(FATAL) << "MaxPool currently only supports the following (layout, "
"type) combinations: (NHWC, non-qint8), "
@@ -1107,7 +1098,6 @@ class MaxPoolingNoMaskOp<GPUDevice, T> : public OpKernel {
Padding padding_;
TensorFormat data_format_;
bool use_dnn_;
- bool propagate_nans_;
};
template <typename T>
@@ -1137,7 +1127,6 @@ class MaxPoolingNoMaskV2Op<GPUDevice, T> : public OpKernel {
}
OP_REQUIRES_OK(context, context->GetAttr("padding", &padding_));
use_dnn_ = CanUseCudnn();
- ReadBoolFromEnvVar("TF_ENABLE_MAXPOOL_NANPROP", false, &propagate_nans_);
}
void Compute(OpKernelContext* context) override {
@@ -1179,17 +1168,16 @@ class MaxPoolingNoMaskV2Op<GPUDevice, T> : public OpKernel {
ShapeFromFormat(data_format_, params.tensor_in_batch, params.out_height,
params.out_width, params.depth);
if (use_dnn_ && data_format_ == FORMAT_NCHW) {
- DnnPoolingOp<T>::Compute(context,
- perftools::gputools::dnn::PoolingMode::kMaximum,
- ksize, stride, padding_, data_format_, tensor_in,
- out_shape, propagate_nans_);
+ DnnPoolingOp<T>::Compute(
+ context, perftools::gputools::dnn::PoolingMode::kMaximum, ksize,
+ stride, padding_, data_format_, tensor_in, out_shape);
} else {
CHECK(data_format_ == FORMAT_NHWC)
<< "Non-Cudnn MaxPool only supports NHWC format";
Tensor* output = nullptr;
OP_REQUIRES_OK(context, context->allocate_output(0, out_shape, &output));
LaunchMaxPoolingNoMask<Device, T>::launch(context, params, tensor_in,
- output, propagate_nans_);
+ output);
}
}
@@ -1199,20 +1187,18 @@ class MaxPoolingNoMaskV2Op<GPUDevice, T> : public OpKernel {
Padding padding_;
TensorFormat data_format_;
bool use_dnn_;
- bool propagate_nans_;
};
template <typename T>
struct LaunchMaxPoolingNoMask<Eigen::GpuDevice, T> {
static void launch(OpKernelContext* context, const PoolParameters& params,
- const Tensor& input, Tensor* output, bool propagate_nans) {
+ const Tensor& input, Tensor* output) {
bool status = functor::MaxPoolForwardWithOptionalArgmax<T>()(
input.flat<T>().data(), params.tensor_in_batch, params.tensor_in_rows,
params.tensor_in_cols, params.depth, params.out_height,
params.out_width, params.window_rows, params.window_cols,
params.row_stride, params.col_stride, params.pad_rows, params.pad_cols,
- output->flat<T>().data(), nullptr, context->eigen_gpu_device(),
- propagate_nans);
+ output->flat<T>().data(), nullptr, context->eigen_gpu_device());
if (!status) {
context->SetStatus(
errors::Internal("Failed launching MaxPoolForwardNoMask"));
@@ -1223,8 +1209,7 @@ struct LaunchMaxPoolingNoMask<Eigen::GpuDevice, T> {
template <typename T>
struct LaunchMaxPoolingWithArgmax<Eigen::GpuDevice, T> {
static void launch(OpKernelContext* context, const PoolParameters& params,
- const Tensor& input, Tensor* output, Tensor* argmax,
- bool propagate_nans) {
+ const Tensor& input, Tensor* output, Tensor* argmax) {
bool status = functor::MaxPoolForwardWithOptionalArgmax<T>()(
input.flat<T>().data(), params.tensor_in_batch, params.tensor_in_rows,
params.tensor_in_cols, params.depth, params.out_height,
@@ -1232,7 +1217,7 @@ struct LaunchMaxPoolingWithArgmax<Eigen::GpuDevice, T> {
params.row_stride, params.col_stride, params.pad_rows, params.pad_cols,
output->flat<T>().data(),
reinterpret_cast<int64*>(argmax->flat<int64>().data()),
- context->eigen_gpu_device(), propagate_nans);
+ context->eigen_gpu_device());
if (!status) {
context->SetStatus(
errors::Internal("Failed launching MaxPoolForwardWithArgmax"));
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-03 11:55:50 +0000