Split cwise_op_equal_to, cwise_op_not_equal, cwise_op_add, and cwise_op_mul

into two files each, to improve compilation times.

Remove the REGISTER10, REGISTER11, REGISTER12 macros; with that many types,
we'll want to shard into instead.
Change: 134616712

1 files changed, 34 insertions, 0 deletions

diff --git a/tensorflow/core/kernels/cwise_op_not_equal_to_2.cc b/tensorflow/core/kernels/cwise_op_not_equal_to_2.cc
new file mode 100644
index 0000000000..59424d7a28
--- /dev/null
+++ b/tensorflow/core/kernels/cwise_op_not_equal_to_2.cc
@@ -0,0 +1,34 @@
+/* Copyright 2015 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+#include "tensorflow/core/kernels/cwise_ops_common.h"
+
+namespace tensorflow {
+
+// REGISTER# macros ignore all but first type (assumed to be float) when
+// __ANDROID_TYPES_SLIM__ is defined.  Since this file is the second of two
+// sharded files, only make its register calls when not __ANDROID_TYPES_SLIM__.
+#if !defined(__ANDROID_TYPES_SLIM__)
+
+REGISTER6(BinaryOp, CPU, "NotEqual", functor::not_equal_to, int32, int64,
+          complex64, complex128, string, bool);
+#if GOOGLE_CUDA
+REGISTER4(BinaryOp, GPU, "NotEqual", functor::not_equal_to, int8, int16, int64,
+          bool);
+
+#endif  // GOOGLE_CUDA
+
+#endif   // !defined(__ANDROID_TYPES_SLIM__)
+}  // namespace tensorflow