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authorGravatar A. Unique TensorFlower <gardener@tensorflow.org>2016-09-28 19:28:55 -0800
committerGravatar TensorFlower Gardener <gardener@tensorflow.org>2016-09-28 20:36:00 -0700
commita373b0f6bf3dd3ebd80ad9c72485de9c37c815ae (patch)
treead1ab9f9041d6865de63d43574395c86e672a369 /tensorflow/core/kernels/cwise_op_mul_1.cc
parent1ba2b851402ac6edbf4549169006252c2bf8ae5a (diff)
Split cwise_op_equal_to, cwise_op_not_equal, cwise_op_add, and cwise_op_mul
into two files each, to improve compilation times. Remove the REGISTER10, REGISTER11, REGISTER12 macros; with that many types, we'll want to shard into instead. Change: 134616712
Diffstat (limited to 'tensorflow/core/kernels/cwise_op_mul_1.cc')
-rw-r--r--tensorflow/core/kernels/cwise_op_mul_1.cc37
1 files changed, 37 insertions, 0 deletions
diff --git a/tensorflow/core/kernels/cwise_op_mul_1.cc b/tensorflow/core/kernels/cwise_op_mul_1.cc
new file mode 100644
index 0000000000..09e9f070da
--- /dev/null
+++ b/tensorflow/core/kernels/cwise_op_mul_1.cc
@@ -0,0 +1,37 @@
+/* Copyright 2015 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+#include "tensorflow/core/kernels/cwise_ops_common.h"
+
+namespace tensorflow {
+
+REGISTER5(BinaryOp, CPU, "Mul", functor::mul, float, Eigen::half, double,
+ uint8, int32);
+#if GOOGLE_CUDA
+REGISTER4(BinaryOp, GPU, "Mul", functor::mul, float, Eigen::half, double,
+ uint8);
+// A special GPU kernel for int32.
+// TODO(b/25387198): Also enable int32 in device memory. This kernel
+// registration requires all int32 inputs and outputs to be in host memory.
+REGISTER_KERNEL_BUILDER(Name("Mul")
+ .Device(DEVICE_GPU)
+ .HostMemory("x")
+ .HostMemory("y")
+ .HostMemory("z")
+ .TypeConstraint<int32>("T"),
+ BinaryOp<CPUDevice, functor::mul<int32>>);
+#endif
+
+} // namespace tensorflow