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| author |  Mike Klein <mtklein@chromium.org> | 2018-02-26 13:34:21 -0500 |
|---|---|---|
| committer |  Skia Commit-Bot <skia-commit-bot@chromium.org> | 2018-02-26 19:51:48 +0000 |
| commit | 0bf89269eb2954c9abd613a2a6de93fcf3163d97 (patch) | |
| tree | 783a4284a6897594084f9181640fb877f2f3ae65 /tests | |
| parent | 8385a8a44bd06cbd400bc66440466229dc52f33f (diff) | |
align f16 buffers in SkRasterPipeline_tail test
The load_f16 and store_f16 stages are assuming they can load
each pixel at a time with 8 byte alignment, but as declared
the buffers are only guaranteed 2 byte alignment.
Bug: skia:7497
Change-Id: I47b29f13b48f90d2b15540979c3d87ba25dcc506
Reviewed-on: https://skia-review.googlesource.com/110321
Reviewed-by: Kevin Lubick <kjlubick@google.com>
Commit-Queue: Mike Klein <mtklein@chromium.org>
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/SkRasterPipelineTest.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/SkRasterPipelineTest.cpp b/tests/SkRasterPipelineTest.cpp index 1923f1cb64..ac0278386a 100644 --- a/tests/SkRasterPipelineTest.cpp +++ b/tests/SkRasterPipelineTest.cpp @@ -137,13 +137,13 @@ DEF_TEST(SkRasterPipeline_tail, r) { } { - uint16_t data[][4] = { + alignas(8) uint16_t data[][4] = { {h(00), h(01), h(02), h(03)}, {h(10), h(11), h(12), h(13)}, {h(20), h(21), h(22), h(23)}, {h(30), h(31), h(32), h(33)}, }; - uint16_t buffer[4][4]; + alignas(8) uint16_t buffer[4][4]; SkJumper_MemoryCtx src = { &data[0][0], 0 }, dst = { &buffer[0][0], 0 }; |