Consistent naming.

For stages that have {r,g,b,a} and {dr,dg,db,da} versions, name the {r,g,b,a} one "foo" and the {dr,dg,db,da} on "foo_d".  The {r,g,b,a} registers are the ones most commonly used and fastest, so they get short ordinary names, and the d-registers are less commonly used and sometimes slower, so they get a suffix.

Some stages naturally opearate on all 8 registers (the xfermodes, accumulate).  These names for those look fine and aren't ambiguous.

Also, a bit more re-arrangement in _opts.h.

CQ_INCLUDE_TRYBOTS=skia.primary:Test-Ubuntu-GCC-GCE-CPU-AVX2-x86_64-Release-SKNX_NO_SIMD

Change-Id: Ia20029247642798a60a2566e8a26b84ed101dbd0
Reviewed-on: https://skia-review.googlesource.com/5291
Reviewed-by: Mike Klein <mtklein@chromium.org>
Commit-Queue: Mike Klein <mtklein@chromium.org>

1 files changed, 2 insertions, 2 deletions

diff --git a/tests/SkRasterPipelineTest.cpp b/tests/SkRasterPipelineTest.cpp
index e3f2ca291a..427bc93015 100644
--- a/tests/SkRasterPipelineTest.cpp
+++ b/tests/SkRasterPipelineTest.cpp
@@ -21,8 +21,8 @@ DEF_TEST(SkRasterPipeline, r) {
     void* store_ctx  = &result;
 
     SkRasterPipeline p;
-    p.append(SkRasterPipeline::load_s_f16, &load_s_ctx);
-    p.append(SkRasterPipeline::load_d_f16, &load_d_ctx);
+    p.append(SkRasterPipeline::load_f16, &load_s_ctx);
+    p.append(SkRasterPipeline::load_f16_d, &load_d_ctx);
     p.append(SkRasterPipeline::srcover);
     p.append(SkRasterPipeline::store_f16, &store_ctx);
     p.compile()(0,0, 1);