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| author |  commit-bot@chromium.org <commit-bot@chromium.org@2bbb7eff-a529-9590-31e7-b0007b416f81> | 2014-05-08 15:27:52 +0000 |
|---|---|---|
| committer | commit-bot@chromium.org <commit-bot@chromium.org@2bbb7eff-a529-9590-31e7-b0007b416f81> | 2014-05-08 15:27:52 +0000 |
| commit | 443c0a6d61536ad826f29da852042fca26be0c40 (patch) | |
| tree | ad8614aff45560f9665072151ec7fd3284b93064 /include | |
| parent | 877ed07e246a572d0450bd95b9ab8398f609c0c4 (diff) | |
Revert of Improved x86 SSE build and run-time checks. (https://codereview.chromium.org/272503006/)
Reason for revert:
Windows builders breaking. :(
Original issue's description:
> Improved x86 SSE build and run-time checks.
>
> Replaces the current build/run-time checks for SSE level in
> opts_check_x86.cpp with a simpler and more future-proof version.
> Also adds SSE versions 4.1 and 4.2 to the config file.
>
> Author: henrik.smiding@intel.com
>
> Signed-off-by: Henrik Smiding <henrik.smiding@intel.com>
>
> Committed: http://code.google.com/p/skia/source/detail?r=14644
R=reed@google.com, tomhudson@google.com, djsollen@google.com, joakim.landberg@intel.com, henrik.smiding@intel.com
TBR=djsollen@google.com, henrik.smiding@intel.com, joakim.landberg@intel.com, reed@google.com, tomhudson@google.com
NOTREECHECKS=true
NOTRY=true
Author: mtklein@google.com
Review URL: https://codereview.chromium.org/277593004
git-svn-id: http://skia.googlecode.com/svn/trunk@14646 2bbb7eff-a529-9590-31e7-b0007b416f81
Diffstat (limited to 'include')
| -rw-r--r-- | include/core/SkPreConfig.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/include/core/SkPreConfig.h b/include/core/SkPreConfig.h index a15f8ecf22..9aefc2d64a 100644 --- a/include/core/SkPreConfig.h +++ b/include/core/SkPreConfig.h @@ -123,18 +123,12 @@ #define SK_CPU_SSE_LEVEL_SSE2 20 #define SK_CPU_SSE_LEVEL_SSE3 30 #define SK_CPU_SSE_LEVEL_SSSE3 31 -#define SK_CPU_SSE_LEVEL_SSE41 41 -#define SK_CPU_SSE_LEVEL_SSE42 42 // Are we in GCC? #ifndef SK_CPU_SSE_LEVEL // These checks must be done in descending order to ensure we set the highest // available SSE level. - #if defined(__SSE4_2__) - #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE42 - #elif defined(__SSE4_1__) - #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE41 - #elif defined(__SSSE3__) + #if defined(__SSSE3__) #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSSE3 #elif defined(__SSE3__) #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE3 |