diff options
author | Mike Klein <mtklein@chromium.org> | 2016-11-28 18:23:23 -0500 |
---|---|---|
committer | Skia Commit-Bot <skia-commit-bot@chromium.org> | 2016-11-29 00:29:32 +0000 |
commit | 729b58296282da00fb9c0f92db2e2e8a8347d431 (patch) | |
tree | b300e97e3c8d306dbe8e3a5f005d1c5ffb1a06d9 /bench/SkRasterPipelineBench.cpp | |
parent | 6f0286f0b4e61dd6373b693f7f1913cd66eba074 (diff) |
Consistent naming.
For stages that have {r,g,b,a} and {dr,dg,db,da} versions, name the {r,g,b,a} one "foo" and the {dr,dg,db,da} on "foo_d". The {r,g,b,a} registers are the ones most commonly used and fastest, so they get short ordinary names, and the d-registers are less commonly used and sometimes slower, so they get a suffix.
Some stages naturally opearate on all 8 registers (the xfermodes, accumulate). These names for those look fine and aren't ambiguous.
Also, a bit more re-arrangement in _opts.h.
CQ_INCLUDE_TRYBOTS=skia.primary:Test-Ubuntu-GCC-GCE-CPU-AVX2-x86_64-Release-SKNX_NO_SIMD
Change-Id: Ia20029247642798a60a2566e8a26b84ed101dbd0
Reviewed-on: https://skia-review.googlesource.com/5291
Reviewed-by: Mike Klein <mtklein@chromium.org>
Commit-Queue: Mike Klein <mtklein@chromium.org>
Diffstat (limited to 'bench/SkRasterPipelineBench.cpp')
-rw-r--r-- | bench/SkRasterPipelineBench.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/bench/SkRasterPipelineBench.cpp b/bench/SkRasterPipelineBench.cpp index 84c0930466..64e59c8b54 100644 --- a/bench/SkRasterPipelineBench.cpp +++ b/bench/SkRasterPipelineBench.cpp @@ -37,13 +37,13 @@ public: void* dst_ctx = dst; SkRasterPipeline p; - p.append(SkRasterPipeline::load_s_8888, &src_ctx); - p.append(SkRasterPipeline::from_srgb_s); + p.append(SkRasterPipeline::load_8888, &src_ctx); + p.append(SkRasterPipeline::from_srgb); p.append(SkRasterPipeline::scale_u8, &mask_ctx); if (kF16) { - p.append(SkRasterPipeline::load_d_f16, &dst_ctx); + p.append(SkRasterPipeline::load_f16_d, &dst_ctx); } else { - p.append(SkRasterPipeline::load_d_8888, &dst_ctx); + p.append(SkRasterPipeline::load_8888_d, &dst_ctx); p.append(SkRasterPipeline::from_srgb_d); } p.append(SkRasterPipeline::srcover); |