Commit message (Collapse) | Author | Age | ||
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* | [opcodes] updated parse-opcodes for latex tables | 2010-10-05 | ||
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* | [opcodes] update parse-opcodes | 2010-10-05 | ||
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* | [xcc, sim] mff now uses rs2 for data | 2010-10-02 | ||
| | | | | this is symmetric with fp stores, so we only need one decoding pipe | |||
* | [opcodes, sim, xcc] added mffl.d instruction | 2010-09-28 | ||
| | | | | ...to be used instead of mff.s when doing int -> DP FP moves on a 32-bit cpu | |||
* | [xcc, sim] changed instruction format so imm12 subs for rs2 | 2010-09-20 | ||
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* | [xcc, sim] replaced ble/bleu with bge/bgeu | 2010-09-13 | ||
| | | | | This will simplify control logic (since every branch has a logical inverse) | |||
* | [opcodes] fixed tex table for ish,ishw types | 2010-09-12 | ||
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* | [sim] renamed sllv to sll (same for other shifts) | 2010-09-12 | ||
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* | [xcc, sim] moved shamt field and renamed shifts | 2010-09-12 | ||
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* | [xcc, sim] branches now are next-PC-based, not PC-based | 2010-09-12 | ||
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* | [sim, xcc] Added mffh.d/mtflh.d; fixed FP ABI for 32-bit | 2010-09-10 | ||
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* | [opcodes,xcc,sim] mffh.d,mtfh.d added (broken commit) | 2010-09-10 | ||
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* | [opcodes] latex table generation added, new opcode mapping | 2010-09-10 | ||