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-rw-r--r--opcodes-rvc59
-rw-r--r--opcodes-rvc-pseudo19
2 files changed, 44 insertions, 34 deletions
diff --git a/opcodes-rvc b/opcodes-rvc
index 5f18a8e..39b960e 100644
--- a/opcodes-rvc
+++ b/opcodes-rvc
@@ -1,32 +1,41 @@
# compressed instructions
# C0 encoding space
-c.mv 1..0=0 15..13=0 12=0 11..2=ignore # !rs2 = c.jr
-c.add 1..0=0 15..13=0 12=1 11..2=ignore # !rs1 = c.ebreak; !rs2=c.jalr
-c.fsd 1..0=0 15..13=1 12=ignore 11..2=ignore
-c.sw 1..0=0 15..13=2 12=ignore 11..2=ignore
-c.fsw 1..0=0 15..13=3 12=ignore 11..2=ignore # c.sd for RV64
-c.addi4spn 1..0=0 15..13=4 12=ignore 11..2=ignore
-c.fld 1..0=0 15..13=5 12=ignore 11..2=ignore
-c.lw 1..0=0 15..13=6 12=ignore 11..2=ignore
-c.flw 1..0=0 15..13=7 12=ignore 11..2=ignore # c.ld for RV64
+c.addi4spn 1..0=0 15..13=0 12=ignore 11..2=ignore
+c.fld 1..0=0 15..13=1 12=ignore 11..2=ignore
+c.lw 1..0=0 15..13=2 12=ignore 11..2=ignore
+c.flw 1..0=0 15..13=3 12=ignore 11..2=ignore # c.ld for RV64
+c.fsd 1..0=0 15..13=5 12=ignore 11..2=ignore
+c.sw 1..0=0 15..13=6 12=ignore 11..2=ignore
+c.fsw 1..0=0 15..13=7 12=ignore 11..2=ignore # c.sd for RV64
# C1 encoding space
-c.slli 1..0=1 15..13=0 12=ignore 11..2=ignore
-c.fsdsp 1..0=1 15..13=1 12=ignore 11..2=ignore
-c.swsp 1..0=1 15..13=2 12=ignore 11..2=ignore
-c.fswsp 1..0=1 15..13=3 12=ignore 11..2=ignore # c.sdsp for RV64
-c.addw 1..0=1 15..13=4 12=0 11..2=ignore
-c.fldsp 1..0=1 15..13=5 12=ignore 11..2=ignore
-c.lwsp 1..0=1 15..13=6 12=ignore 11..2=ignore
-c.flwsp 1..0=1 15..13=7 12=ignore 11..2=ignore # c.ldsp for RV64
+c.srli 1..0=1 15..13=0 12=ignore 11..10=0 9..2=ignore
+c.srai 1..0=1 15..13=0 12=ignore 11..10=1 9..2=ignore
+c.andi 1..0=1 15..13=0 12=ignore 11..10=2 9..2=ignore
+c.addw 1..0=1 15..13=0 12=0 11..10=3 9..7=ignore 6..5=0 4..2=ignore
+c.sll 1..0=1 15..13=0 12=0 11..10=3 9..7=ignore 6..5=1 4..2=ignore
+c.subw 1..0=1 15..13=0 12=0 11..10=3 9..7=ignore 6..5=2 4..2=ignore
+c.sub 1..0=1 15..13=0 12=0 11..10=3 9..7=ignore 6..5=3 4..2=ignore
+c.xor 1..0=1 15..13=0 12=1 11..10=3 9..7=ignore 6..5=0 4..2=ignore
+c.srl 1..0=1 15..13=0 12=1 11..10=3 9..7=ignore 6..5=1 4..2=ignore
+c.or 1..0=1 15..13=0 12=1 11..10=3 9..7=ignore 6..5=2 4..2=ignore
+c.and 1..0=1 15..13=0 12=1 11..10=3 9..7=ignore 6..5=3 4..2=ignore
+c.j 1..0=1 15..13=1 12=ignore 11..2=ignore
+c.beqz 1..0=1 15..13=2 12=ignore 11..2=ignore
+c.bnez 1..0=1 15..13=3 12=ignore 11..2=ignore
+c.addi 1..0=1 15..13=4 12=ignore 11..2=ignore
+c.jal 1..0=1 15..13=5 12=ignore 11..2=ignore # c.addiw for RV64
+c.li 1..0=1 15..13=6 12=ignore 11..2=ignore
+c.lui 1..0=1 15..13=7 12=ignore 11..2=ignore # c.addi16sp when rd=2
# C2 encoding space
-c.j 1..0=2 15..13=0 12=ignore 11..2=ignore
-c.jal 1..0=2 15..13=1 12=ignore 11..2=ignore
-c.beqz 1..0=2 15..13=2 12=ignore 11..2=ignore
-c.bnez 1..0=2 15..13=3 12=ignore 11..2=ignore
-c.li 1..0=2 15..13=4 12=ignore 11..2=ignore
-c.lui 1..0=2 15..13=5 12=ignore 11..2=ignore # c.addi16sp when rd=0
-c.addi 1..0=2 15..13=6 12=ignore 11..2=ignore
-c.addiw 1..0=2 15..13=7 12=ignore 11..2=ignore
+c.slli 1..0=2 15..13=0 12=ignore 11..2=ignore
+c.fldsp 1..0=2 15..13=1 12=ignore 11..2=ignore
+c.lwsp 1..0=2 15..13=2 12=ignore 11..2=ignore
+c.flwsp 1..0=2 15..13=3 12=ignore 11..2=ignore # c.ldsp for RV64
+c.mv 1..0=2 15..13=4 12=0 11..2=ignore # !rs2 = c.jr
+c.add 1..0=2 15..13=4 12=1 11..2=ignore # !rs1 = c.ebreak; !rs2=c.jalr
+c.fsdsp 1..0=2 15..13=5 12=ignore 11..2=ignore
+c.swsp 1..0=2 15..13=6 12=ignore 11..2=ignore
+c.fswsp 1..0=2 15..13=7 12=ignore 11..2=ignore # c.sdsp for RV64
diff --git a/opcodes-rvc-pseudo b/opcodes-rvc-pseudo
index a357a03..43c6199 100644
--- a/opcodes-rvc-pseudo
+++ b/opcodes-rvc-pseudo
@@ -1,14 +1,15 @@
# these aren't really pseudo-ops, but they overlay other encodings,
# so they are here to prevent parse-opcodes from barfing
-@c.jr 1..0=0 15..13=0 12=0 11..7=ignore 6..2=0
-@c.jalr 1..0=0 15..13=0 12=1 11..7=ignore 6..2=0
-@c.ebreak 1..0=0 15..13=0 12=1 11..7=0 6..2=0
-@c.addi16sp 1..0=2 15..13=5 12=ignore 11..7=0 6..2=ignore
-@c.nop 1..0=2 15..13=6 12=0 11..7=0 6..2=0
+@c.nop 1..0=1 15..13=4 12=0 11..7=0 6..2=0
+@c.addi16sp 1..0=1 15..13=7 12=ignore 11..7=2 6..2=ignore
+@c.jr 1..0=2 15..13=4 12=0 11..7=ignore 6..2=0
+@c.jalr 1..0=2 15..13=4 12=1 11..7=ignore 6..2=0
+@c.ebreak 1..0=2 15..13=4 12=1 11..7=0 6..2=0
# RV64C
-@c.sd 1..0=0 15..13=3 12=ignore 11..2=ignore # c.fsw for RV32
-@c.ld 1..0=0 15..13=7 12=ignore 11..2=ignore # c.flw for RV32
-@c.sdsp 1..0=1 15..13=3 12=ignore 11..2=ignore # c.fswsp for RV32
-@c.ldsp 1..0=1 15..13=7 12=ignore 11..2=ignore # c.flwsp for RV32
+@c.ld 1..0=0 15..13=3 12=ignore 11..2=ignore # c.flw for RV32
+@c.sd 1..0=0 15..13=7 12=ignore 11..2=ignore # c.fsw for RV32
+@c.addiw 1..0=1 15..13=5 12=ignore 11..2=ignore # c.jal for RV32
+@c.ldsp 1..0=2 15..13=3 12=ignore 11..2=ignore # c.flwsp for RV32
+@c.sdsp 1..0=2 15..13=7 12=ignore 11..2=ignore # c.fswsp for RV32