Update ISA encoding

1 files changed, 5 insertions, 4 deletions

diff --git a/Makefile b/Makefile
index ed3936f..6034644 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@ PK_H := ../riscv-pk/pk/riscv-opc.h
 GAS_H := ../riscv-gcc/binutils-2.21.1/include/opcode/riscv-opc.h
 XCC_H := ../riscv-gcc/gcc-4.6.1/gcc/config/riscv/riscv-opc.h 
 
-install: $(ISASIM_H) $(PK_H) $(GAS_H) $(XCC_H) inst.v instr-table.tex
+install: $(ISASIM_H) $(PK_H) $(GAS_H) $(XCC_H) inst.chisel instr-table.tex
 
 $(ISASIM_H): opcodes parse-opcodes
 	./parse-opcodes -isasim < $< > $@
@@ -13,15 +13,16 @@ $(PK_H): opcodes parse-opcodes
 
 $(GAS_H): opcodes opcodes-hwacha opcodes-rvc opcodes-custom parse-opcodes
 	./parse-opcodes -disasm < $< > $@
-	./parse-opcodes -disasm < opcodes-hwacha >> $@
+	#./parse-opcodes -disasm < opcodes-hwacha >> $@
 	./parse-opcodes -disasm < opcodes-rvc >> $@
 	./parse-opcodes -disasm < opcodes-custom >> $@
 
 $(XCC_H): opcodes parse-opcodes
 	./parse-opcodes -disasm < $< > $@
 
-inst.v: opcodes parse-opcodes
-	./parse-opcodes -verilog < $< > $@
+inst.chisel: opcodes parse-opcodes
+	./parse-opcodes -chisel < $< > $@
+	./parse-opcodes -chisel < opcodes-custom >> $@
 
 instr-table.tex: opcodes parse-opcodes
 	./parse-opcodes -tex < $< > $@