diff options
| author |  Andrew Waterman <waterman@eecs.berkeley.edu> | 2014-03-11 23:56:10 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@eecs.berkeley.edu> | 2014-03-11 23:56:10 -0700 |
| commit | 94c98fd09835dd4e2f0c37cfc7034d7ee74599c8 (patch) | |
| tree | 337cc29d5326c44d038a4abdaa95fc9e0a051515 | |
| parent | a414c8a716e8e9c7ac676e3ffaf6e072c1b9cc2e (diff) | |
Fix syntax error in generated opcodes
| -rw-r--r-- | opcodes-pseudo | 6 | ||||
| -rwxr-xr-x | parse-opcodes | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/opcodes-pseudo b/opcodes-pseudo index 3bd44ee..ba28d72 100644 --- a/opcodes-pseudo +++ b/opcodes-pseudo @@ -1,7 +1,7 @@ # Instructions that differ slightly between rv32 and rv64 -@slli-rv32 rd rs1 31..25=0 shamtw 14..12=1 6..2=0x04 1..0=3 -@srli-rv32 rd rs1 31..25=0 shamtw 14..12=5 6..2=0x04 1..0=3 -@srai-rv32 rd rs1 31..25=32 shamtw 14..12=5 6..2=0x04 1..0=3 +@slli.rv32 rd rs1 31..25=0 shamtw 14..12=1 6..2=0x04 1..0=3 +@srli.rv32 rd rs1 31..25=0 shamtw 14..12=5 6..2=0x04 1..0=3 +@srai.rv32 rd rs1 31..25=32 shamtw 14..12=5 6..2=0x04 1..0=3 # SYSTEM pseudo-instructions that map to csr* @frflags rd 19..15=0 31..20=0x001 14..12=2 6..2=0x1C 1..0=3 diff --git a/parse-opcodes b/parse-opcodes index 91801c2..9d43f1d 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -152,7 +152,7 @@ def str_arg(arg0,name,match,arguments): return binary(yank(match,start,len),len) def str_inst(name,arguments): - ret = name.upper().replace('-RV32','') + ' ' + ret = name.replace('.rv32','').upper() + ' ' if 'imm12hi' in arguments and 'imm12lo' in arguments: arguments.remove('imm12hi') arguments.remove('imm12lo') @@ -571,7 +571,7 @@ def make_latex_table(): print_insts('lui', 'auipc') print_insts('jal', 'jalr', 'beq', 'bne', 'blt', 'bge', 'bltu', 'bgeu') print_insts('lb', 'lh', 'lw', 'lbu', 'lhu', 'sb', 'sh', 'sw') - print_insts('addi', 'slti', 'sltiu', 'xori', 'ori', 'andi', 'slli-rv32', 'srli-rv32', 'srai-rv32') + print_insts('addi', 'slti', 'sltiu', 'xori', 'ori', 'andi', 'slli.rv32', 'srli.rv32', 'srai.rv32') print_insts('add', 'sub', 'sll', 'slt', 'sltu', 'xor', 'srl', 'sra', 'or', 'and') print_insts('fence', 'fence.i') print_insts('scall', 'sbreak', 'rdcycle', 'rdtime', 'rdinstret') |