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authorGravatar Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU>2011-04-09 17:37:42 -0700
committerGravatar Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU>2011-04-09 17:37:42 -0700
commit9212085398dee4aecfead02897d8ad3686afe6bc (patch)
treecd3649644b1b60b6ca130522af9524d015c9a6e4
parent474eb8f8c73714e74d0075a588ff75b5d6636b2a (diff)
[xcc,pk,sim,opcodes] added first RVC instruction
-rw-r--r--inst.v6
-rw-r--r--opcodes11
-rwxr-xr-xparse-opcodes11
3 files changed, 16 insertions, 12 deletions
diff --git a/inst.v b/inst.v
index f25f019..191a14c 100644
--- a/inst.v
+++ b/inst.v
@@ -1,4 +1,3 @@
-`define UNIMP 32'b00000000000000000000000000000000
`define J 32'b?????????????????????????_1100111
`define JAL 32'b?????????????????????????_1101111
`define JALR_C 32'b?????_?????_????????????_000_1101011
@@ -82,12 +81,12 @@
`define AMOMAXU_D 32'b?????_?????_?????_0000111011_0101011
`define FENCE_I 32'b?????_?????_????????????_001_0101111
`define FENCE 32'b?????_?????_????????????_010_0101111
+`define SYSCALL 32'b00000_00000_00000_0000000000_1110111
+`define BREAK 32'b00000_00000_00000_0000000001_1110111
`define FENCE_L_V 32'b?????_?????_????????????_100_0101111
`define FENCE_G_V 32'b?????_?????_????????????_101_0101111
`define FENCE_L_CV 32'b?????_?????_????????????_110_0101111
`define FENCE_G_CV 32'b?????_?????_????????????_111_0101111
-`define SYSCALL 32'b00000_00000_00000_0000000000_1110111
-`define BREAK 32'b00000_00000_00000_0000000001_1110111
`define STOP 32'b00000_00000_00000_0000000010_1110111
`define UTIDX 32'b?????_00000_00000_0000000011_1110111
`define EI 32'b?????_00000_00000_0000000000_1111011
@@ -228,3 +227,4 @@
`define VCFGIVL 32'b?????_?????_????????????_000_1110011
`define SETVL 32'b?????_?????_000000000000_001_1110011
`define VF 32'b00000_?????_????????????_010_1110011
+`define C_ADDI 32'b00000000000000000000000000000000
diff --git a/opcodes b/opcodes
index 1ca81f4..28e35ed 100644
--- a/opcodes
+++ b/opcodes
@@ -6,8 +6,6 @@
#
# <args> is one of xa,xb,xc,fa,fb,fc,fd,imm,imm20,imm27,shamt,shamtw
-unimp 31..0=0
-
j imm25 6..2=0x19 1..0=3
jal imm25 6..2=0x1B 1..0=3
@@ -109,15 +107,15 @@ amomaxu.d rd rs1 rs2 16..10=7 9..7=3 6..2=0x0A 1..0=3
fence.i rd rs1 imm12 9..7=1 6..2=0x0B 1..0=3
fence rd rs1 imm12 9..7=2 6..2=0x0B 1..0=3
+syscall 31..27=0 26..22=0 21..17=0 16..7=0 6..2=0x1D 1..0=3
+break 31..27=0 26..22=0 21..17=0 16..7=1 6..2=0x1D 1..0=3
+
# vector fence instructions
fence.l.v rd rs1 imm12 9..7=4 6..2=0x0B 1..0=3
fence.g.v rd rs1 imm12 9..7=5 6..2=0x0B 1..0=3
fence.l.cv rd rs1 imm12 9..7=6 6..2=0x0B 1..0=3
fence.g.cv rd rs1 imm12 9..7=7 6..2=0x0B 1..0=3
-syscall 31..27=0 26..22=0 21..17=0 16..7=0 6..2=0x1D 1..0=3
-break 31..27=0 26..22=0 21..17=0 16..7=1 6..2=0x1D 1..0=3
-
# vector scalar instructions
stop 31..27=0 26..22=0 21..17=0 16..7=2 6..2=0x1D 1..0=3
utidx rd 26..22=0 21..17=0 16..7=3 6..2=0x1D 1..0=3
@@ -317,3 +315,6 @@ fmov.us rd rs1 rs2 16=1 15=1 14..12=0 11..7=3 6..2=0x0
vcfgivl rd rs1 imm12 9..7=0 6..2=0x1C 1..0=3
setvl rd rs1 21..10=0 9..7=1 6..2=0x1C 1..0=3
vf 31..27=0 rs1 imm12 9..7=2 6..2=0x1C 1..0=3
+
+# compressed instructions
+c.addi cimm6 crd5 4..0=0
diff --git a/parse-opcodes b/parse-opcodes
index 6857c58..45d16db 100755
--- a/parse-opcodes
+++ b/parse-opcodes
@@ -24,6 +24,9 @@ arglut['imm12lo'] = (16,10)
arglut['shamt'] = (15,10)
arglut['shamtw'] = (14,10)
+arglut['crd5'] = (9,5)
+arglut['cimm6'] = (15,10)
+
typelut = {} # 0=unimp,1=j,2=lui,3=imm,4=r,5=r4,6=ish,7=ishw,10=b
typelut[0x00] = 0
typelut[0x03] = 3
@@ -126,18 +129,18 @@ def make_switch(match,mask):
print ' #include "insns/%s.h"' % name2
print ' break;'
print ' }'
- print ' #include "insns/unimp.h"'
+ print ' throw trap_illegal_instruction;'
print ' }'
print ' default:'
print ' {'
- print ' #include "insns/unimp.h"'
+ print ' throw trap_illegal_instruction;'
print ' }'
print ' }'
print ' break;'
print ' }'
print ' default:'
print ' {'
- print ' #include "insns/unimp.h"'
+ print ' throw trap_illegal_instruction;'
print ' }'
print '}'
@@ -781,7 +784,7 @@ for line in sys.stdin:
else:
sys.exit("%s: unknown token %s" % (name,token))
- if cover != 0xFFFFFFFF:
+ if not (cover == 0xFFFFFFFF or cover == 0xFFFF):
sys.exit("%s: not all bits are covered" % name)
for name2,match2 in match.iteritems():