1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
|
// Generic alpha renderers for all YUV modes and RGB depths.
// Optimized by Nick and Michael
// Code from Michael Niedermayer (michaelni@gmx.at) is under GPL
#undef PREFETCH
#undef EMMS
#undef PREFETCHW
#undef PAVGB
#ifdef HAVE_3DNOW
#define PREFETCH "prefetch"
#define PREFETCHW "prefetchw"
#define PAVGB "pavgusb"
#elif defined ( HAVE_MMX2 )
#define PREFETCH "prefetchnta"
#define PREFETCHW "prefetcht0"
#define PAVGB "pavgb"
#else
#define PREFETCH "/nop"
#define PREFETCHW "/nop"
#endif
#ifdef HAVE_3DNOW
/* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */
#define EMMS "femms"
#else
#define EMMS "emms"
#endif
static inline void RENAME(vo_draw_alpha_yv12)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#if defined(FAST_OSD) && !defined(HAVE_MMX)
w=w>>1;
#endif
#ifdef HAVE_MMX
asm volatile(
"pcmpeqb %%mm5, %%mm5\n\t" // F..F
"movq %%mm5, %%mm4\n\t"
"movq %%mm5, %%mm7\n\t"
"psllw $8, %%mm5\n\t" //FF00FF00FF00
"psrlw $8, %%mm4\n\t" //00FF00FF00FF
::);
#endif
for(y=0;y<h;y++){
register int x;
#ifdef HAVE_MMX
asm volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
for(x=0;x<w;x+=8){
asm volatile(
"movl %1, %%eax\n\t"
"orl 4%1, %%eax\n\t"
" jz 1f\n\t"
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y
"psrlw $8, %%mm1\n\t" //0Y0Y0Y0Y
"movq %1, %%mm2\n\t" //srca HGFEDCBA
"paddb %%mm7, %%mm2\n\t"
"movq %%mm2, %%mm3\n\t"
"pand %%mm4, %%mm2\n\t" //0G0E0C0A
"psrlw $8, %%mm3\n\t" //0H0F0D0B
"pmullw %%mm2, %%mm0\n\t"
"pmullw %%mm3, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"pand %%mm5, %%mm1\n\t"
"por %%mm1, %%mm0\n\t"
"paddb %2, %%mm0\n\t"
"movq %%mm0, %0\n\t"
"1:\n\t"
:: "m" (dstbase[x]), "m" (srca[x]), "m" (src[x])
: "%eax");
}
#else
for(x=0;x<w;x++){
#ifdef FAST_OSD
if(srca[2*x+0]) dstbase[2*x+0]=src[2*x+0];
if(srca[2*x+1]) dstbase[2*x+1]=src[2*x+1];
#else
if(srca[x]) dstbase[x]=((dstbase[x]*srca[x])>>8)+src[x];
#endif
}
#endif
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
#ifdef HAVE_MMX
asm volatile(EMMS:::"memory");
#endif
return;
}
static inline void RENAME(vo_draw_alpha_yuy2)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#if defined(FAST_OSD) && !defined(HAVE_MMX)
w=w>>1;
#endif
#ifdef HAVE_MMX
asm volatile(
"pxor %%mm7, %%mm7\n\t"
"pcmpeqb %%mm5, %%mm5\n\t" // F..F
"movq %%mm5, %%mm6\n\t"
"movq %%mm5, %%mm4\n\t"
"psllw $8, %%mm5\n\t" //FF00FF00FF00
"psrlw $8, %%mm4\n\t" //00FF00FF00FF
::);
#endif
for(y=0;y<h;y++){
register int x;
#ifdef HAVE_MMX
asm volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dstbase),"m"(*srca),"m"(*src));
for(x=0;x<w;x+=4){
asm volatile(
"movl %1, %%eax\n\t"
"orl %%eax, %%eax\n\t"
" jz 1f\n\t"
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y
"movd %%eax, %%mm2\n\t" //srca 0000DCBA
"paddb %%mm6, %%mm2\n\t"
"punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A
"pmullw %%mm2, %%mm0\n\t"
"psrlw $8, %%mm0\n\t"
"pand %%mm5, %%mm1\n\t" //U0V0U0V0
"movd %2, %%mm2\n\t" //src 0000DCBA
"punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A
"por %%mm1, %%mm0\n\t"
"paddb %%mm2, %%mm0\n\t"
"movq %%mm0, %0\n\t"
"1:\n\t"
:: "m" (dstbase[x*2]), "m" (srca[x]), "m" (src[x])
: "%eax");
}
#else
for(x=0;x<w;x++){
#ifdef FAST_OSD
if(srca[2*x+0]) dstbase[4*x+0]=src[2*x+0];
if(srca[2*x+1]) dstbase[4*x+2]=src[2*x+1];
#else
if(srca[x]) {
dstbase[2*x]=((dstbase[2*x]*srca[x])>>8)+src[x];
dstbase[2*x+1]=((((signed)dstbase[2*x+1]-128)*srca[x])>>8)+128;
}
#endif
}
#endif
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
#ifdef HAVE_MMX
asm volatile(EMMS:::"memory");
#endif
return;
}
static inline void RENAME(vo_draw_alpha_uyvy)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#if defined(FAST_OSD)
w=w>>1;
#endif
for(y=0;y<h;y++){
register int x;
for(x=0;x<w;x++){
#ifdef FAST_OSD
if(srca[2*x+0]) dstbase[4*x+2]=src[2*x+0];
if(srca[2*x+1]) dstbase[4*x+0]=src[2*x+1];
#else
if(srca[x]) {
dstbase[2*x+1]=((dstbase[2*x+1]*srca[x])>>8)+src[x];
dstbase[2*x]=((((signed)dstbase[2*x]-128)*srca[x])>>8)+128;
}
#endif
}
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
}
static inline void RENAME(vo_draw_alpha_rgb24)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#ifdef HAVE_MMX
asm volatile(
"pxor %%mm7, %%mm7\n\t"
"pcmpeqb %%mm6, %%mm6\n\t" // F..F
::);
#endif
for(y=0;y<h;y++){
register unsigned char *dst = dstbase;
register int x;
#if defined(ARCH_X86) && (!defined(ARCH_X86_64) || defined(HAVE_MMX))
#ifdef HAVE_MMX
asm volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dst),"m"(*srca),"m"(*src):"memory");
for(x=0;x<w;x+=2){
if(srca[x] || srca[x+1])
asm volatile(
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"movq %%mm0, %%mm5\n\t"
"punpcklbw %%mm7, %%mm0\n\t"
"punpckhbw %%mm7, %%mm1\n\t"
"movd %1, %%mm2\n\t" // srca ABCD0000
"paddb %%mm6, %%mm2\n\t"
"punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD
"punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB
"psrlq $8, %%mm2\n\t" // srca AAABBBB0
"movq %%mm2, %%mm3\n\t"
"punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0B
"punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B00
"pmullw %%mm2, %%mm0\n\t"
"pmullw %%mm3, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"psrlw $8, %%mm1\n\t"
"packuswb %%mm1, %%mm0\n\t"
"movd %2, %%mm2 \n\t" // src ABCD0000
"punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD
"punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB
"psrlq $8, %%mm2\n\t" // src AAABBBB0
"paddb %%mm2, %%mm0\n\t"
"pand %4, %%mm5\n\t"
"pand %3, %%mm0\n\t"
"por %%mm0, %%mm5\n\t"
"movq %%mm5, %0\n\t"
:: "m" (dst[0]), "m" (srca[x]), "m" (src[x]), "m"(mask24hl), "m"(mask24lh));
dst += 6;
}
#else /* HAVE_MMX */
for(x=0;x<w;x++){
if(srca[x]){
asm volatile(
"movzbl (%0), %%ecx\n\t"
"movzbl 1(%0), %%eax\n\t"
"imull %1, %%ecx\n\t"
"imull %1, %%eax\n\t"
"addl %2, %%ecx\n\t"
"addl %2, %%eax\n\t"
"movb %%ch, (%0)\n\t"
"movb %%ah, 1(%0)\n\t"
"movzbl 2(%0), %%eax\n\t"
"imull %1, %%eax\n\t"
"addl %2, %%eax\n\t"
"movb %%ah, 2(%0)\n\t"
:
:"D" (dst),
"r" ((unsigned)srca[x]),
"r" (((unsigned)src[x])<<8)
:"%eax", "%ecx"
);
}
dst += 3;
}
#endif /* !HAVE_MMX */
#else /*non x86 arch or x86_64 with MMX disabled */
for(x=0;x<w;x++){
if(srca[x]){
#ifdef FAST_OSD
dst[0]=dst[1]=dst[2]=src[x];
#else
dst[0]=((dst[0]*srca[x])>>8)+src[x];
dst[1]=((dst[1]*srca[x])>>8)+src[x];
dst[2]=((dst[2]*srca[x])>>8)+src[x];
#endif
}
dst+=3; // 24bpp
}
#endif /* arch_x86 */
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
#ifdef HAVE_MMX
asm volatile(EMMS:::"memory");
#endif
return;
}
static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#ifdef WORDS_BIGENDIAN
dstbase++;
#endif
#ifdef HAVE_MMX
#ifdef HAVE_3DNOW
asm volatile(
"pxor %%mm7, %%mm7\n\t"
"pcmpeqb %%mm6, %%mm6\n\t" // F..F
::);
#else /* HAVE_3DNOW */
asm volatile(
"pxor %%mm7, %%mm7\n\t"
"pcmpeqb %%mm5, %%mm5\n\t" // F..F
"movq %%mm5, %%mm4\n\t"
"psllw $8, %%mm5\n\t" //FF00FF00FF00
"psrlw $8, %%mm4\n\t" //00FF00FF00FF
::);
#endif /* HAVE_3DNOW */
#endif /* HAVE_MMX */
for(y=0;y<h;y++){
register int x;
#if defined(ARCH_X86) && (!defined(ARCH_X86_64) || defined(HAVE_MMX))
#ifdef HAVE_MMX
#ifdef HAVE_3DNOW
asm volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
for(x=0;x<w;x+=2){
if(srca[x] || srca[x+1])
asm volatile(
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"punpcklbw %%mm7, %%mm0\n\t"
"punpckhbw %%mm7, %%mm1\n\t"
"movd %1, %%mm2\n\t" // srca ABCD0000
"paddb %%mm6, %%mm2\n\t"
"punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD
"punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB
"movq %%mm2, %%mm3\n\t"
"punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0A
"punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B0B
"pmullw %%mm2, %%mm0\n\t"
"pmullw %%mm3, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"psrlw $8, %%mm1\n\t"
"packuswb %%mm1, %%mm0\n\t"
"movd %2, %%mm2 \n\t" // src ABCD0000
"punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD
"punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB
"paddb %%mm2, %%mm0\n\t"
"movq %%mm0, %0\n\t"
:: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x]));
}
#else //this is faster for intels crap
asm volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
for(x=0;x<w;x+=4){
asm volatile(
"movl %1, %%eax\n\t"
"orl %%eax, %%eax\n\t"
" jz 1f\n\t"
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"pand %%mm4, %%mm0\n\t" //0R0B0R0B
"psrlw $8, %%mm1\n\t" //0?0G0?0G
"movd %%eax, %%mm2\n\t" //srca 0000DCBA
"paddb "MANGLE(bFF)", %%mm2\n\t"
"punpcklbw %%mm2, %%mm2\n\t" //srca DDCCBBAA
"movq %%mm2, %%mm3\n\t"
"punpcklbw %%mm7, %%mm2\n\t" //srca 0B0B0A0A
"pmullw %%mm2, %%mm0\n\t"
"pmullw %%mm2, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"pand %%mm5, %%mm1\n\t"
"por %%mm1, %%mm0\n\t"
"movd %2, %%mm2 \n\t" //src 0000DCBA
"punpcklbw %%mm2, %%mm2\n\t" //src DDCCBBAA
"movq %%mm2, %%mm6\n\t"
"punpcklbw %%mm2, %%mm2\n\t" //src BBBBAAAA
"paddb %%mm2, %%mm0\n\t"
"movq %%mm0, %0\n\t"
"movq 8%0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"pand %%mm4, %%mm0\n\t" //0R0B0R0B
"psrlw $8, %%mm1\n\t" //0?0G0?0G
"punpckhbw %%mm7, %%mm3\n\t" //srca 0D0D0C0C
"pmullw %%mm3, %%mm0\n\t"
"pmullw %%mm3, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"pand %%mm5, %%mm1\n\t"
"por %%mm1, %%mm0\n\t"
"punpckhbw %%mm6, %%mm6\n\t" //src DDDDCCCC
"paddb %%mm6, %%mm0\n\t"
"movq %%mm0, 8%0\n\t"
"1:\n\t"
:: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x])
: "%eax");
}
#endif
#else /* HAVE_MMX */
for(x=0;x<w;x++){
if(srca[x]){
asm volatile(
"movzbl (%0), %%ecx\n\t"
"movzbl 1(%0), %%eax\n\t"
"movzbl 2(%0), %%edx\n\t"
"imull %1, %%ecx\n\t"
"imull %1, %%eax\n\t"
"imull %1, %%edx\n\t"
"addl %2, %%ecx\n\t"
"addl %2, %%eax\n\t"
"addl %2, %%edx\n\t"
"movb %%ch, (%0)\n\t"
"movb %%ah, 1(%0)\n\t"
"movb %%dh, 2(%0)\n\t"
:
:"r" (&dstbase[4*x]),
"r" ((unsigned)srca[x]),
"r" (((unsigned)src[x])<<8)
:"%eax", "%ecx", "%edx"
);
}
}
#endif /* HAVE_MMX */
#else /*non x86 arch or x86_64 with MMX disabled */
for(x=0;x<w;x++){
if(srca[x]){
#ifdef FAST_OSD
dstbase[4*x+0]=dstbase[4*x+1]=dstbase[4*x+2]=src[x];
#else
dstbase[4*x+0]=((dstbase[4*x+0]*srca[x])>>8)+src[x];
dstbase[4*x+1]=((dstbase[4*x+1]*srca[x])>>8)+src[x];
dstbase[4*x+2]=((dstbase[4*x+2]*srca[x])>>8)+src[x];
#endif
}
}
#endif /* arch_x86 */
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
#ifdef HAVE_MMX
asm volatile(EMMS:::"memory");
#endif
return;
}
|
