diff options
| -rw-r--r-- | Eigen/src/Core/arch/AltiVec/PacketMath.h | 4 | ||||
| -rw-r--r-- | Eigen/src/Core/arch/Default/Settings.h | 9 | ||||
| -rw-r--r-- | Eigen/src/Core/arch/NEON/PacketMath.h | 4 | ||||
| -rw-r--r-- | doc/I14_PreprocessorDirectives.dox | 2 |
4 files changed, 0 insertions, 19 deletions
diff --git a/Eigen/src/Core/arch/AltiVec/PacketMath.h b/Eigen/src/Core/arch/AltiVec/PacketMath.h index 88a8e3669..96cb54283 100644 --- a/Eigen/src/Core/arch/AltiVec/PacketMath.h +++ b/Eigen/src/Core/arch/AltiVec/PacketMath.h @@ -35,10 +35,6 @@ namespace internal { #define EIGEN_HAS_FUSE_CJMADD 1 #endif -#ifndef EIGEN_TUNE_FOR_CPU_CACHE_SIZE -#define EIGEN_TUNE_FOR_CPU_CACHE_SIZE 8*256*256 -#endif - // NOTE Altivec has 32 registers, but Eigen only accepts a value of 8 or 16 #ifndef EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS #define EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS 16 diff --git a/Eigen/src/Core/arch/Default/Settings.h b/Eigen/src/Core/arch/Default/Settings.h index ca777f965..957adc8fe 100644 --- a/Eigen/src/Core/arch/Default/Settings.h +++ b/Eigen/src/Core/arch/Default/Settings.h @@ -46,15 +46,6 @@ #define EIGEN_CACHEFRIENDLY_PRODUCT_THRESHOLD 8 #endif -/** Defines the maximal size in Bytes of blocks fitting in CPU cache. - * The current value is set to generate blocks of 256x256 for float - * - * Typically for a single-threaded application you would set that to 25% of the size of your CPU caches in bytes - */ -#ifndef EIGEN_TUNE_FOR_CPU_CACHE_SIZE -#define EIGEN_TUNE_FOR_CPU_CACHE_SIZE (sizeof(float)*512*512) -#endif - /** Defines the maximal width of the blocks used in the triangular product and solver * for vectors (level 2 blas xTRMV and xTRSV). The default is 8. */ diff --git a/Eigen/src/Core/arch/NEON/PacketMath.h b/Eigen/src/Core/arch/NEON/PacketMath.h index c09a5a885..d826e969b 100644 --- a/Eigen/src/Core/arch/NEON/PacketMath.h +++ b/Eigen/src/Core/arch/NEON/PacketMath.h @@ -33,10 +33,6 @@ namespace internal { #define EIGEN_CACHEFRIENDLY_PRODUCT_THRESHOLD 8 #endif -#ifndef EIGEN_TUNE_FOR_CPU_CACHE_SIZE -#define EIGEN_TUNE_FOR_CPU_CACHE_SIZE 4*192*192 -#endif - // FIXME NEON has 16 quad registers, but since the current register allocator // is so bad, it is much better to reduce it to 8 #ifndef EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS diff --git a/doc/I14_PreprocessorDirectives.dox b/doc/I14_PreprocessorDirectives.dox index cbb63d587..2dd38d93d 100644 --- a/doc/I14_PreprocessorDirectives.dox +++ b/doc/I14_PreprocessorDirectives.dox @@ -52,8 +52,6 @@ run time. However, these assertions do cost time and can thus be turned off. - \b EIGEN_UNROLLING_LIMIT - defines the size of a loop to enable meta unrolling. Set it to zero to disable unrolling. The size of a loop here is expressed in Eigen's own notion of "number of FLOPS", it does not correspond to the number of iterations or the number of instructions. The default is value 100. - - \b EIGEN_TUNE_FOR_CPU_CACHE_SIZE - represents the maximal size in Bytes of L2 blocks. Since several blocks - have to stay concurently in L2 cache, this value should correspond to at most 1/4 of the size of L2 cache. \section TopicPreprocessorDirectivesPlugins Plugins |