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| author |  Eugene Zhulenev <ezhulenev@google.com> | 2019-09-24 12:52:45 -0700 |
|---|---|---|
| committer | Eugene Zhulenev <ezhulenev@google.com> | 2019-09-24 12:52:45 -0700 |
| commit | ef9dfee7bdc8e0d82c9b7ddf9414ef99d866d7ba (patch) | |
| tree | 490a8ae1f247cf226475f504ea1d3ab305b98097 /unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h | |
| parent | efd9867ff0e8df23016ac6c9828d0d7bf8bec1b1 (diff) | |
Tensor block evaluation V2 support for unary/binary/broadcsting
Diffstat (limited to 'unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h')
| -rw-r--r-- | unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h b/unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h index b630e6867..8860840a7 100644 --- a/unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h +++ b/unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h @@ -149,6 +149,7 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device> Layout = TensorEvaluator<ArgType, Device>::Layout, PacketAccess = TensorEvaluator<ArgType, Device>::PacketAccess, BlockAccess = TensorEvaluator<ArgType, Device>::BlockAccess, + BlockAccessV2 = false, // Chipping of outer-most dimension is a trivial operation, because we can // read and write directly from the underlying tensor using single offset. IsOuterChipping = (static_cast<int>(Layout) == ColMajor && DimId == NumInputDims - 1) || @@ -169,6 +170,10 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device> typedef internal::TensorBlock<ScalarNoConst, Index, NumDims, Layout> OutputTensorBlock; + //===- Tensor block evaluation strategy (see TensorBlock.h) -------------===// + typedef internal::TensorBlockNotImplemented TensorBlockV2; + //===--------------------------------------------------------------------===// + EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE TensorEvaluator(const XprType& op, const Device& device) : m_impl(op.expression(), device), m_dim(op.dim()), m_device(device) { |