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author | Eugene Zhulenev <ezhulenev@google.com> | 2019-10-17 11:17:33 -0700 |
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committer | Eugene Zhulenev <ezhulenev@google.com> | 2019-10-17 11:17:33 -0700 |
commit | df0e8b81370f741c734e4f4187d029d6a8cb18f2 (patch) | |
tree | 69347bdb7dd4196768cc9373ed7aac50c8340a0a /unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h | |
parent | 0d2a14ce11c85abdfc68ca37fc66e3cace088b24 (diff) |
Propagate block evaluation preference through rvalue tensor expressions
Diffstat (limited to 'unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h')
-rw-r--r-- | unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h b/unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h index fe30f9867..32d6960bf 100644 --- a/unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h +++ b/unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h @@ -157,8 +157,10 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device> // Chipping inner-most dimension. IsInnerChipping = (static_cast<int>(Layout) == ColMajor && DimId == 0) || (static_cast<int>(Layout) == RowMajor && DimId == NumInputDims - 1), - // Do not choose block access if chipping is trivial. - PreferBlockAccess = !IsOuterChipping, + // Prefer block access if the underlying expression prefers it, otherwise + // only if chipping is not trivial. + PreferBlockAccess = TensorEvaluator<ArgType, Device>::PreferBlockAccess || + !IsOuterChipping, CoordAccess = false, // to be implemented RawAccess = false }; |