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authorGravatar Christoph Hertzberg <chtz@informatik.uni-bremen.de>2016-03-20 10:57:08 +0100
committerGravatar Christoph Hertzberg <chtz@informatik.uni-bremen.de>2016-03-20 10:57:08 +0100
commitb224771f403def7ade226a7410262361f495f668 (patch)
tree63ab65ed66650f17d59f71dadbeadb8bfd5392f6 /bench/btl
parent8e03333f06f4a55c5d9698caca208fa91dcc87f3 (diff)
bug #1178: Simplified modification of the SSE control register for better portability
Diffstat (limited to 'bench/btl')
-rw-r--r--bench/btl/generic_bench/btl.hh13
1 files changed, 4 insertions, 9 deletions
diff --git a/bench/btl/generic_bench/btl.hh b/bench/btl/generic_bench/btl.hh
index 92af1306a..706b00fb0 100644
--- a/bench/btl/generic_bench/btl.hh
+++ b/bench/btl/generic_bench/btl.hh
@@ -44,15 +44,10 @@
#define BTL_ASM_COMMENT(X)
#endif
-#if (defined __GNUC__) && (!defined __INTEL_COMPILER) && !defined(__arm__) && !defined(__powerpc__)
-#define BTL_DISABLE_SSE_EXCEPTIONS() { \
- int aux = 0; \
- asm( \
- "stmxcsr %[aux] \n\t" \
- "orl $32832, %[aux] \n\t" \
- "ldmxcsr %[aux] \n\t" \
- : : [aux] "m" (aux)); \
-}
+#ifdef __SSE__
+#include "xmmintrin.h"
+// This enables flush to zero (FTZ) and denormals are zero (DAZ) modes:
+#define BTL_DISABLE_SSE_EXCEPTIONS() { _mm_setcsr(_mm_getcsr() | 0x8040); }
#else
#define BTL_DISABLE_SSE_EXCEPTIONS()
#endif