ao psf/psf2/spu reentrancy WIP

16 files changed, 347 insertions, 339 deletions

diff --git a/plugins/ao/eng_psf/eng_psf.c b/plugins/ao/eng_psf/eng_psf.c
index 74b6528a..d37a553f 100644
--- a/plugins/ao/eng_psf/eng_psf.c
+++ b/plugins/ao/eng_psf/eng_psf.c
@@ -44,24 +44,25 @@
 
 #define DEBUG_LOADER	(0)
 
-char *spu_pOutput; // hack!
 int psf_refresh = -1; // hack
 
 typedef struct {
     corlett_t	*c;
     char psfby[256];
     mips_cpu_context *mips_cpu;
+    char *spu_pOutput;
 } psf_synth_t;
 
-// main RAM
-extern uint32 psx_ram[((2*1024*1024)/4)+4];
-extern uint32 psx_scratch[0x400];
-extern uint32 initial_ram[((2*1024*1024)/4)+4];
-extern uint32 initial_scratch[0x400];
 static uint32 initialPC, initialGP, initialSP;
 
 extern void setlength(int32 stop, int32 fade);
 
+static void spu_update (unsigned char* pSound,long lBytes,void *data)
+{
+    psf_synth_t *s = data;
+	memcpy(s->spu_pOutput, pSound, lBytes);
+}
+
 void *psf_start(uint8 *buffer, uint32 length)
 {
     psf_synth_t *s = malloc (sizeof (psf_synth_t));
@@ -74,9 +75,6 @@ void *psf_start(uint8 *buffer, uint32 length)
 	int i;
 	union cpuinfo mipsinfo;
 
-	// clear PSX work RAM before we start scribbling in it
-	memset(psx_ram, 0, 2*1024*1024);
-
 //	printf("Length = %d\n", length);
 
 	// Decode the current GSF
@@ -121,6 +119,7 @@ void *psf_start(uint8 *buffer, uint32 length)
 	printf("Top level: PC %x GP %x SP %x\n", PC, GP, SP);
 	#endif
 
+	s->mips_cpu = mips_alloc();
 	// Get the library file, if any
 	if (s->c->lib[0] != 0)
 	{
@@ -191,7 +190,7 @@ void *psf_start(uint8 *buffer, uint32 length)
 		#if DEBUG_LOADER
 		printf("library offset: %x plength: %d\n", offset, plength);
 		#endif
-		memcpy(&psx_ram[offset/4], lib_decoded+2048, plength);
+		memcpy(&s->mips_cpu->psx_ram[offset/4], lib_decoded+2048, plength);
 		
 		// Dispose the corlett structure for the lib - we don't use it
 		free(lib);
@@ -207,7 +206,7 @@ void *psf_start(uint8 *buffer, uint32 length)
 	{
 		plength = file_len-2048;
 	}
-	memcpy(&psx_ram[offset/4], file+2048, plength);
+	memcpy(&s->mips_cpu->psx_ram[offset/4], file+2048, plength);
 
 	// load any auxiliary libraries now
 	for (i = 0; i < 8; i++)
@@ -257,7 +256,7 @@ void *psf_start(uint8 *buffer, uint32 length)
 			offset = alib_decoded[0x18] | alib_decoded[0x19]<<8 | alib_decoded[0x1a]<<16 | alib_decoded[0x1b]<<24;
 			offset &= 0x3fffffff;	// kill any MIPS cache segment indicators
 			plength = alib_decoded[0x1c] | alib_decoded[0x1d]<<8 | alib_decoded[0x1e]<<16 | alib_decoded[0x1f]<<24;
-			memcpy(&psx_ram[offset/4], alib_decoded+2048, plength);
+			memcpy(&s->mips_cpu->psx_ram[offset/4], alib_decoded+2048, plength);
 		
 			// Dispose the corlett structure for the lib - we don't use it
 			free(lib);
@@ -279,9 +278,11 @@ void *psf_start(uint8 *buffer, uint32 length)
 		}
 	}
 
-	s->mips_cpu = mips_alloc();
 	mips_init (s->mips_cpu);
 	mips_reset(s->mips_cpu, NULL);
+//	// clear PSX work RAM before we start scribbling in it
+//	memset(s->mips_cpu->psx_ram, 0, 2*1024*1024);
+
 
 	// set the initial PC, SP, GP
 	#if DEBUG_LOADER	
@@ -315,8 +316,8 @@ void *psf_start(uint8 *buffer, uint32 length)
 	#endif
 
 	psx_hw_init(s->mips_cpu);
-	SPUinit();
-	SPUopen();
+	SPUinit(s->mips_cpu, spu_update, s);
+	SPUopen(s->mips_cpu);
 
 	lengthMS = psfTimeToMS(s->c->inf_length);
 	fadeMS = psfTimeToMS(s->c->inf_fade);
@@ -339,11 +340,11 @@ void *psf_start(uint8 *buffer, uint32 length)
 	{
 		if (!strcmp(s->c->inf_game, "Chocobo Dungeon 2"))
 		{
-			if (psx_ram[0xbc090/4] == LE32(0x0802f040))
+			if (s->mips_cpu->psx_ram[0xbc090/4] == LE32(0x0802f040))
 			{
-		 		psx_ram[0xbc090/4] = LE32(0);
-				psx_ram[0xbc094/4] = LE32(0x0802f040);
-				psx_ram[0xbc098/4] = LE32(0);
+		 		s->mips_cpu->psx_ram[0xbc090/4] = LE32(0);
+				s->mips_cpu->psx_ram[0xbc094/4] = LE32(0x0802f040);
+				s->mips_cpu->psx_ram[0xbc098/4] = LE32(0);
 			}
 		}
 	}
@@ -351,8 +352,8 @@ void *psf_start(uint8 *buffer, uint32 length)
 //	psx_ram[0x118b8/4] = LE32(0);	// crash 2 hack
 
 	// backup the initial state for restart
-	memcpy(initial_ram, psx_ram, 2*1024*1024);
-	memcpy(initial_scratch, psx_scratch, 0x400);
+	memcpy(s->mips_cpu->initial_ram, s->mips_cpu->psx_ram, 2*1024*1024);
+	memcpy(s->mips_cpu->initial_scratch, s->mips_cpu->psx_scratch, 0x400);
 	initialPC = PC;
 	initialGP = GP;
 	initialSP = SP;
@@ -362,11 +363,6 @@ void *psf_start(uint8 *buffer, uint32 length)
 	return s;
 }
 
-void spu_update (unsigned char* pSound,long lBytes)
-{
-	memcpy(spu_pOutput, pSound, lBytes);
-}
-
 int32 psf_gen(void *handle, int16 *buffer, uint32 samples)
 {	
     psf_synth_t *s = handle;
@@ -375,11 +371,11 @@ int32 psf_gen(void *handle, int16 *buffer, uint32 samples)
 	for (i = 0; i < samples; i++)
 	{
 		psx_hw_slice(s->mips_cpu);
-		SPUasync(384);
+		SPUasync(s->mips_cpu, 384);
 	}
 
-	spu_pOutput = (char *)buffer;
-	SPU_flushboot();
+    s->spu_pOutput = (char *)buffer;
+	SPU_flushboot(s->mips_cpu);
 
 	psx_hw_frame(s->mips_cpu);
 
@@ -389,7 +385,7 @@ int32 psf_gen(void *handle, int16 *buffer, uint32 samples)
 int32 psf_stop(void *handle)
 {
     psf_synth_t *s = handle;
-	SPUclose();
+	SPUclose(s->mips_cpu);
 	free(s->c);
 	free (s);
 
@@ -405,16 +401,16 @@ int32 psf_command(void *handle, int32 command, int32 parameter)
 	switch (command)
 	{
 		case COMMAND_RESTART:
-			SPUclose();
+			SPUclose(s->mips_cpu);
 
-			memcpy(psx_ram, initial_ram, 2*1024*1024);
-			memcpy(psx_scratch, initial_scratch, 0x400);
+			memcpy(s->mips_cpu->psx_ram, s->mips_cpu->initial_ram, 2*1024*1024);
+			memcpy(s->mips_cpu->psx_scratch, s->mips_cpu->initial_scratch, 0x400);
 
 //			mips_init();
 			mips_reset(s->mips_cpu, NULL);
 			psx_hw_init(s->mips_cpu);
-			SPUinit();
-			SPUopen();
+            SPUinit(s->mips_cpu, spu_update, s);
+            SPUopen(s->mips_cpu);
 
 			lengthMS = psfTimeToMS(s->c->inf_length);
 			fadeMS = psfTimeToMS(s->c->inf_fade);
diff --git a/plugins/ao/eng_psf/eng_psf2.c b/plugins/ao/eng_psf/eng_psf2.c
index 8db99dc5..2da270b9 100644
--- a/plugins/ao/eng_psf/eng_psf2.c
+++ b/plugins/ao/eng_psf/eng_psf2.c
@@ -68,10 +68,7 @@
 #define ELF32_R_TYPE(val)               ((val) & 0xff)
 
 // main RAM
-extern uint32 psx_ram[(2*1024*1024)/4];
-extern uint32 initial_ram[(2*1024*1024)/4];
 static uint32 loadAddr, lengthMS, fadeMS;
-static char		*spu_pOutput;
 static uint8 *filesys[MAX_FS];
 static uint32 fssize[MAX_FS];
 static int num_fs;
@@ -83,10 +80,18 @@ typedef struct {
 
     uint8 *lib_raw_file;
     mips_cpu_context *mips_cpu;
+    char		*spu_pOutput;
 } psf2_synth_t;
 
 extern void setlength2(int32 stop, int32 fade);
 
+void ps2_update(unsigned char *pSound, long lBytes, void *data)
+{
+    psf2_synth_t *s = data;
+	memcpy(s->spu_pOutput, pSound, lBytes);	// (for direct 44.1kHz output)
+}
+
+#if 0
 static uint32 secname(uint8 *start, uint32 strndx, uint32 shoff, uint32 shentsize, uint32 name)
 {
 	uint32 offset, shent;
@@ -101,6 +106,7 @@ static uint32 secname(uint8 *start, uint32 strndx, uint32 shoff, uint32 shentsiz
 	
 	return offset;	
 }
+#endif
 
 static void do_iopmod(uint8 *start, uint32 offset)
 {
@@ -179,7 +185,7 @@ uint32 psf2_load_elf(mips_cpu_context *cpu, uint8 *start, uint32 len)
 				break;
 
 			case 1:			// PROGBITS: copy data to destination
-				memcpy(&psx_ram[(loadAddr + addr)/4], &start[offset], size);
+				memcpy(&cpu->psx_ram[(loadAddr + addr)/4], &start[offset], size);
 				totallen += size;
 				break;
 
@@ -190,7 +196,7 @@ uint32 psf2_load_elf(mips_cpu_context *cpu, uint8 *start, uint32 len)
 				break;
 
 			case 8:			// NOBITS: BSS region, zero out destination
-				memset(&psx_ram[(loadAddr + addr)/4], 0, size);
+				memset(&cpu->psx_ram[(loadAddr + addr)/4], 0, size);
 				totallen += size;
 				break;
 
@@ -202,7 +208,7 @@ uint32 psf2_load_elf(mips_cpu_context *cpu, uint8 *start, uint32 len)
 
 					offs = start[offset+(rec*8)] | start[offset+1+(rec*8)]<<8 | start[offset+2+(rec*8)]<<16 | start[offset+3+(rec*8)]<<24;
 					info = start[offset+4+(rec*8)] | start[offset+5+(rec*8)]<<8 | start[offset+6+(rec*8)]<<16 | start[offset+7+(rec*8)]<<24;
-					target = LE32(psx_ram[(loadAddr+offs)/4]);
+					target = LE32(cpu->psx_ram[(loadAddr+offs)/4]);
 					
 //					printf("[%04d] offs %08x type %02x info %08x => %08x\n", rec, offs, ELF32_R_TYPE(info), ELF32_R_SYM(info), target);
 
@@ -241,7 +247,7 @@ uint32 psf2_load_elf(mips_cpu_context *cpu, uint8 *start, uint32 len)
 							val = loadAddr + vallo;
 							target = (target & ~0xffff) | (val & 0xffff);
 
-							psx_ram[(loadAddr+hi16offs)/4] = LE32(hi16target);
+							cpu->psx_ram[(loadAddr+hi16offs)/4] = LE32(hi16target);
 							break;
 
 						default:
@@ -250,7 +256,7 @@ uint32 psf2_load_elf(mips_cpu_context *cpu, uint8 *start, uint32 len)
 							break;
 					}
 
-					psx_ram[(loadAddr+offs)/4] = LE32(target);
+					cpu->psx_ram[(loadAddr+offs)/4] = LE32(target);
 				}						
 				break;
 
@@ -337,7 +343,7 @@ static uint32 load_file_ex(uint8 *top, uint8 *start, uint32 len, char *file, uin
 				uerr = uncompress(&buf[uofs], &dlength, &top[cofs], usize);
 				if (uerr != Z_OK)
 				{
-					printf("Decompress fail: %x %d!\n", dlength, uerr);
+					printf("Decompress fail: %x %d!\n", (unsigned int)dlength, uerr);
 					return 0xffffffff;
 				}
 
@@ -466,9 +472,6 @@ void *psf2_start(uint8 *buffer, uint32 length)
 	loadAddr = 0x23f00;	// this value makes allocations work out similarly to how they would 
 				// in Highly Experimental (as per Shadow Hearts' hard-coded assumptions)
 
-	// clear IOP work RAM before we start scribbling in it
-	memset(psx_ram, 0, 2*1024*1024);
-
 	// Decode the current PSF2
 	if (corlett_decode(buffer, length, &file, &file_len, &s->c) != AO_SUCCESS)
 	{
@@ -476,7 +479,7 @@ void *psf2_start(uint8 *buffer, uint32 length)
 		return NULL;
 	}
 
-	if (file_len > 0) printf("ERROR: PSF2 can't have a program section!  ps %08x\n", file_len);
+	if (file_len > 0) printf("ERROR: PSF2 can't have a program section!  ps %08x\n", (unsigned int)file_len);
 
 	#if DEBUG_LOADER
 	printf("FS section: size %x\n", s->c->res_size);
@@ -572,28 +575,23 @@ void *psf2_start(uint8 *buffer, uint32 length)
 
 	mipsinfo.i = 0x80000004;	// argv
 	mips_set_info(s->mips_cpu, CPUINFO_INT_REGISTER + MIPS_R5, &mipsinfo);
-	psx_ram[1] = LE32(0x80000008);
+	s->mips_cpu->psx_ram[1] = LE32(0x80000008);
 	
-	buf = (uint8 *)&psx_ram[2];
+	buf = (uint8 *)(&s->mips_cpu->psx_ram[2]);
 	strcpy((char *)buf, "aofile:/");		
 
-	psx_ram[0] = LE32(FUNCT_HLECALL);
+	s->mips_cpu->psx_ram[0] = LE32(FUNCT_HLECALL);
 
 	// back up initial RAM image to quickly restart songs
-	memcpy(initial_ram, psx_ram, 2*1024*1024);
+	memcpy(s->mips_cpu->initial_ram, s->mips_cpu->psx_ram, 2*1024*1024);
 
 	psx_hw_init(s->mips_cpu);
-	SPU2init();
-	SPU2open(NULL);
+	SPU2init(s->mips_cpu, ps2_update, s);
+	SPU2open(s->mips_cpu, NULL);
 
 	return s;
 }
 
-void ps2_update(unsigned char *pSound, long lBytes)
-{
-	memcpy(spu_pOutput, pSound, lBytes);	// (for direct 44.1kHz output)
-}
-
 int32 psf2_gen(void *handle, int16 *buffer, uint32 samples)
 {	
 	int i;
@@ -602,11 +600,11 @@ int32 psf2_gen(void *handle, int16 *buffer, uint32 samples)
 //	memset (buffer, 0, samples * 4);
 //	return AO_SUCCESS;
 //
-	spu_pOutput = (char *)buffer;
+	s->spu_pOutput = (char *)buffer;
 
 	for (i = 0; i < samples; i++)
 	{
-		SPU2async(1);
+		SPU2async(s->mips_cpu, 1);
 		ps2_hw_slice(s->mips_cpu);
 	}
 
@@ -618,7 +616,7 @@ int32 psf2_gen(void *handle, int16 *buffer, uint32 samples)
 int32 psf2_stop(void *handle)
 {
     psf2_synth_t *s = handle;
-	SPU2close();
+	SPU2close(s->mips_cpu);
 	if (s->c->lib[0] != 0)
 	{
 		free(s->lib_raw_file);
@@ -638,15 +636,15 @@ int32 psf2_command(void *handle, int32 command, int32 parameter)
 	switch (command)
 	{
 		case COMMAND_RESTART:
-			SPU2close();
+			SPU2close(s->mips_cpu);
 
-			memcpy(psx_ram, initial_ram, 2*1024*1024);
+			memcpy(s->mips_cpu->psx_ram, s->mips_cpu->initial_ram, 2*1024*1024);
 
 			mips_init(s->mips_cpu);
 			mips_reset(s->mips_cpu, NULL);
 			psx_hw_init(s->mips_cpu);
-			SPU2init();
-			SPU2open(NULL);
+			SPU2init(s->mips_cpu, ps2_update, s);
+			SPU2open(s->mips_cpu, NULL);
 
 			mipsinfo.i = s->initialPC;
 			mips_set_info(s->mips_cpu, CPUINFO_INT_PC, &mipsinfo);
diff --git a/plugins/ao/eng_psf/eng_spu.c b/plugins/ao/eng_psf/eng_spu.c
index b3752f32..b27aa98d 100644
--- a/plugins/ao/eng_psf/eng_spu.c
+++ b/plugins/ao/eng_psf/eng_spu.c
@@ -40,23 +40,27 @@
 #include "cpuintrf.h"
 #include "psx.h"
 #include "peops/externals.h"
+#include "peops/spu.h"
+#include "peops/regs.h"
 
-extern int SPUinit(void);
-extern int SPUopen(void);
-extern int SPUclose(void);
-extern void SPUinjectRAMImage(unsigned short *source);
 extern void setlength(int32 stop, int32 fade);
-extern void SPUwriteRegister(u32 reg, u16 val);
-extern u16 SPUreadRegister(u32 reg);
 
 typedef struct {
     uint8 *start_of_file, *song_ptr;
     uint32 cur_tick, cur_event, num_events, next_tick, end_tick;
     int old_fmt;
     char name[128], song[128], company[128];
+    char *spu_pOutput;
+    mips_cpu_context *mips_cpu;
 } spu_synth_t;
 
-extern char *spu_pOutput; // hack!
+
+static void spu_update (unsigned char* pSound,long lBytes,void *data)
+{
+    spu_synth_t *s = data;
+	memcpy(s->spu_pOutput, pSound, lBytes);
+}
+
 
 void *spu_start(uint8 *buffer, uint32 length)
 {
@@ -74,19 +78,20 @@ void *spu_start(uint8 *buffer, uint32 length)
 
 	s->start_of_file = buffer;
 
-	SPUinit();
-	SPUopen();
+    s->mips_cpu = mips_alloc ();
+	SPUinit(s->mips_cpu, spu_update, s);
+	SPUopen(s->mips_cpu);
 	setlength(~0, 0);
 
 	// upload the SPU RAM image
-	SPUinjectRAMImage((unsigned short *)&buffer[0]);
+	SPUinjectRAMImage(s->mips_cpu, (unsigned short *)&buffer[0]);
 
 	// apply the register image	
 	for (i = 0; i < 512; i += 2)
 	{
 		reg = buffer[0x80000+i] | buffer[0x80000+i+1]<<8;
 
-		SPUwriteRegister((i/2)+0x1f801c00, reg);
+		SPUwriteRegister(s->mips_cpu, (i/2)+0x1f801c00, reg);
 	}
 
 	s->old_fmt = 1;
@@ -127,9 +132,6 @@ void *spu_start(uint8 *buffer, uint32 length)
 	return s;
 }
 
-extern int SPUasync(uint32 cycles);
-extern void SPU_flushboot(void);
-
 static void spu_tick(spu_synth_t *s)
 {
 	uint32 time, reg, size;
@@ -145,7 +147,7 @@ static void spu_tick(spu_synth_t *s)
 			reg = s->song_ptr[4] | s->song_ptr[5]<<8 | s->song_ptr[6]<<16 | s->song_ptr[7]<<24;
 			rdata = s->song_ptr[8] | s->song_ptr[9]<<8;
 
-			SPUwriteRegister(reg, rdata);
+			SPUwriteRegister(s->mips_cpu, reg, rdata);
 
 			s->cur_event++;
 			s->song_ptr += 12;
@@ -168,7 +170,7 @@ static void spu_tick(spu_synth_t *s)
 						reg = s->song_ptr[0] | s->song_ptr[1]<<8 | s->song_ptr[2]<<16 | s->song_ptr[3]<<24;
 						rdata = s->song_ptr[4] | s->song_ptr[5]<<8;
 
-						SPUwriteRegister(reg, rdata);
+						SPUwriteRegister(s->mips_cpu, reg, rdata);
 
 						s->next_tick = s->song_ptr[6] | s->song_ptr[7]<<8 | s->song_ptr[8]<<16 | s->song_ptr[9]<<24; 
 						s->song_ptr += 10;
@@ -176,7 +178,7 @@ static void spu_tick(spu_synth_t *s)
 
 					case 1:	// read register
 				 		reg = s->song_ptr[0] | s->song_ptr[1]<<8 | s->song_ptr[2]<<16 | s->song_ptr[3]<<24;
-						SPUreadRegister(reg);
+						SPUreadRegister(s->mips_cpu, reg);
 						s->next_tick = s->song_ptr[4] | s->song_ptr[5]<<8 | s->song_ptr[6]<<16 | s->song_ptr[7]<<24; 
 						s->song_ptr += 8;
 						break;
@@ -247,11 +249,11 @@ int32 spu_gen(void *handle, int16 *buffer, uint32 samples)
 		for (i = 0; i < samples; i++)
 		{
 		  	spu_tick(s);
-			SPUasync(384);
+			SPUasync(s->mips_cpu, 384);
 		}
 
-		spu_pOutput = (char *)buffer;
-		SPU_flushboot();
+		s->spu_pOutput = (char *)buffer;
+		SPU_flushboot(s->mips_cpu);
 	}
 	else
 	{
diff --git a/plugins/ao/eng_psf/peops/dma.c b/plugins/ao/eng_psf/peops/dma.c
index 9aab3090..dfa0564c 100644
--- a/plugins/ao/eng_psf/peops/dma.c
+++ b/plugins/ao/eng_psf/peops/dma.c
@@ -28,17 +28,14 @@
 
 #define _IN_DMA
 
-extern uint32 psx_ram[(2*1024*1024)/4];
-
-//#include "externals.h"
 ////////////////////////////////////////////////////////////////////////
 // READ DMA (many values)
 ////////////////////////////////////////////////////////////////////////
 
-void SPUreadDMAMem(u32 usPSXMem,int iSize)
+void SPUreadDMAMem(mips_cpu_context *cpu, u32 usPSXMem,int iSize)
 {
  int i;
- u16 *ram16 = (u16 *)&psx_ram[0];
+ u16 *ram16 = (u16 *)&cpu->psx_ram[0];
 
  for(i=0;i<iSize;i++)
   {
@@ -61,10 +58,10 @@ void SPUreadDMAMem(u32 usPSXMem,int iSize)
 // WRITE DMA (many values)
 ////////////////////////////////////////////////////////////////////////
 
-void SPUwriteDMAMem(u32 usPSXMem,int iSize)
+void SPUwriteDMAMem(mips_cpu_context *cpu, u32 usPSXMem,int iSize)
 {
  int i;
- u16 *ram16 = (u16 *)&psx_ram[0];
+ u16 *ram16 = (u16 *)&cpu->psx_ram[0];
 
  for(i=0;i<iSize;i++)
   {
diff --git a/plugins/ao/eng_psf/peops/dma.h b/plugins/ao/eng_psf/peops/dma.h
index 8c1a7e19..b8a32751 100644
--- a/plugins/ao/eng_psf/peops/dma.h
+++ b/plugins/ao/eng_psf/peops/dma.h
@@ -24,8 +24,9 @@
 //

 //*************************************************************************//

 

+#include "../psx.h"

 

-u16 CALLBACK SPUreadDMA(void);

-void CALLBACK SPUreadDMAMem(u16 * pusPSXMem,int iSize);

-void CALLBACK SPUwriteDMA(u16 val);

-void CALLBACK SPUwriteDMAMem(u16 * pusPSXMem,int iSize);

+u16 CALLBACK SPUreadDMA(mips_cpu_context *cpu);

+void CALLBACK SPUreadDMAMem(mips_cpu_context *cpu, u16 * pusPSXMem,int iSize);

+void CALLBACK SPUwriteDMA(mips_cpu_context *cpu, u16 val);

+void CALLBACK SPUwriteDMAMem(mips_cpu_context *cpu, u16 * pusPSXMem,int iSize);

diff --git a/plugins/ao/eng_psf/peops/registers.c b/plugins/ao/eng_psf/peops/registers.c
index bcafc8c0..5393888f 100644
--- a/plugins/ao/eng_psf/peops/registers.c
+++ b/plugins/ao/eng_psf/peops/registers.c
@@ -57,7 +57,7 @@ static void SetPitch(int ch,u16 val);
 // WRITE REGISTERS: called by main emu
 ////////////////////////////////////////////////////////////////////////
 
-void SPUwriteRegister(u32 reg, u16 val)
+void SPUwriteRegister(mips_cpu_context *cpu, u32 reg, u16 val)
 {
  const u32 r=reg&0xfff;
  regArea[(r-0xc00)>>1] = val;
@@ -297,7 +297,7 @@ void SPUwriteRegister(u32 reg, u16 val)
 // READ REGISTER: called by main emu
 ////////////////////////////////////////////////////////////////////////
 
-u16 SPUreadRegister(u32 reg)
+u16 SPUreadRegister(mips_cpu_context *cpu, u32 reg)
 {
  const u32 r=reg&0xfff;
 
diff --git a/plugins/ao/eng_psf/peops/regs.h b/plugins/ao/eng_psf/peops/regs.h
index 8288830e..ffa11606 100644
--- a/plugins/ao/eng_psf/peops/regs.h
+++ b/plugins/ao/eng_psf/peops/regs.h
@@ -24,4 +24,6 @@
 //
 //*************************************************************************//
 
-void SPUwriteRegister(u32 reg, u16 val);
+#include "../psx.h"
+
+void SPUwriteRegister(mips_cpu_context *cpu, u32 reg, u16 val);
diff --git a/plugins/ao/eng_psf/peops/spu.c b/plugins/ao/eng_psf/peops/spu.c
index b121cd11..4dca0d79 100644
--- a/plugins/ao/eng_psf/peops/spu.c
+++ b/plugins/ao/eng_psf/peops/spu.c
@@ -124,7 +124,7 @@ static const int f[5][2] = {
                         {  115, -52 },
                         {   98, -55 },
                         {  122, -60 } };
-s16 * pS;
+static s16 * pS;
 static s32 ttemp;
 
 ////////////////////////////////////////////////////////////////////////
@@ -202,7 +202,7 @@ void setlength(s32 stop, s32 fade)
 }
 
 #define CLIP(_x) {if(_x>32767) _x=32767; if(_x<-32767) _x=-32767;}
-int SPUasync(u32 cycles)
+int SPUasync(mips_cpu_context *cpu, u32 cycles)
 {
  int volmul=iVolume;
  static s32 dosampies;
@@ -490,12 +490,12 @@ int SPUasync(u32 cycles)
  return(1);
 }
 
-extern void spu_update (unsigned char* pSound,long lBytes); // HACK!
-void SPU_flushboot(void)
+void SPU_flushboot(mips_cpu_context *cpu)
 {
    if((u8*)pS>((u8*)pSpuBuffer+1024))
    {
-    spu_update((u8*)pSpuBuffer,(u8*)pS-(u8*)pSpuBuffer);
+    //spu_update(cpu, (u8*)pSpuBuffer,(u8*)pS-(u8*)pSpuBuffer);
+    cpu->spu_callback ((u8*)pSpuBuffer,(u8*)pS-(u8*)pSpuBuffer, cpu->spu_callback_data);
     pS=(s16 *)pSpuBuffer;
    }
 }   
@@ -522,8 +522,10 @@ static u64 gettime64(void)
 // SPUINIT: this func will be called first by the main emu
 ////////////////////////////////////////////////////////////////////////
               
-int SPUinit(void)
+int SPUinit(mips_cpu_context *cpu, void (*update_cb)(unsigned char *pSound, long lBytes, void *data), void *data)
 {
+    cpu->spu_callback = update_cb;
+    cpu->spu_callback_data = data;
  spuMemC=(u8*)spuMem;                      // just small setup
  memset((void *)s_chan,0,MAXCHAN*sizeof(SPUCHAN));
  memset((void *)&rvb,0,sizeof(REVERBInfo));
@@ -584,7 +586,7 @@ void RemoveStreams(void)
 // SPUOPEN: called by main emu after init
 ////////////////////////////////////////////////////////////////////////
    
-int SPUopen(void)
+int SPUopen(mips_cpu_context *cpu)
 {
  if(bSPUIsOpen) return 0;                              // security for some stupid main emus
  spuIrq=0;                       
@@ -611,7 +613,7 @@ int SPUopen(void)
 // SPUCLOSE: called before shutdown
 ////////////////////////////////////////////////////////////////////////
 
-int SPUclose(void)
+int SPUclose(mips_cpu_context *cpu)
 {
  if(!bSPUIsOpen) return 0;                             // some security
 
@@ -626,12 +628,12 @@ int SPUclose(void)
 // SPUSHUTDOWN: called by main emu on final exit
 ////////////////////////////////////////////////////////////////////////
 
-int SPUshutdown(void)
+int SPUshutdown(mips_cpu_context *cpu)
 {
  return 0;
 }
 
-void SPUinjectRAMImage(u16 *pIncoming)
+void SPUinjectRAMImage(mips_cpu_context *cpu, u16 *pIncoming)
 {
 	int i;
 
diff --git a/plugins/ao/eng_psf/peops/spu.h b/plugins/ao/eng_psf/peops/spu.h
index 3c2cee41..e438ce27 100644
--- a/plugins/ao/eng_psf/peops/spu.h
+++ b/plugins/ao/eng_psf/peops/spu.h
@@ -24,16 +24,18 @@
 //
 //*************************************************************************//
 
+#include "externals.h"
+#include "../psx.h"
 void sexyd_update(unsigned char* pSound,long lBytes);
 
-int SPUasync(u32 cycles);
-void SPU_flushboot(void);
-int SPUinit(void);
-int SPUopen(void);
-int SPUclose(void);
-int SPUshutdown(void);
-void SPUinjectRAMImage(u16 *pIncoming);
-void SPUreadDMAMem(u32 usPSXMem,int iSize);
-void SPUwriteDMAMem(u32 usPSXMem,int iSize);
-u16 SPUreadRegister(u32 reg);
+int SPUasync(mips_cpu_context *cpu, u32 cycles);
+void SPU_flushboot(mips_cpu_context *cpu);
+int SPUinit(mips_cpu_context *cpu, void (*update_cb)(unsigned char *pSound, long lBytes, void *data), void *data);
+int SPUopen(mips_cpu_context *cpu);
+int SPUclose(mips_cpu_context *cpu);
+int SPUshutdown(mips_cpu_context *cpu);
+void SPUinjectRAMImage(mips_cpu_context *cpu, u16 *pIncoming);
+void SPUreadDMAMem(mips_cpu_context *cpu, u32 usPSXMem,int iSize);
+void SPUwriteDMAMem(mips_cpu_context *cpu, u32 usPSXMem,int iSize);
+u16 SPUreadRegister(mips_cpu_context *cpu, u32 reg);
 
diff --git a/plugins/ao/eng_psf/peops2/dma2.c b/plugins/ao/eng_psf/peops2/dma2.c
index d137dfc2..2d07c059 100644
--- a/plugins/ao/eng_psf/peops2/dma2.c
+++ b/plugins/ao/eng_psf/peops2/dma2.c
@@ -34,17 +34,18 @@
 #include "../peops2/externals.h"
 #include "../peops2/registers.h"
 //#include "debug.h"
+#include "../psx.h"
 
-extern uint32 psx_ram[(2*1024*1024)/4];
+//extern uint32 psx_ram[(2*1024*1024)/4];
 
 ////////////////////////////////////////////////////////////////////////
 // READ DMA (many values)
 ////////////////////////////////////////////////////////////////////////
 
-EXPORT_GCC void CALLBACK SPU2readDMA4Mem(u32 usPSXMem,int iSize)
+EXPORT_GCC void CALLBACK SPU2readDMA4Mem(mips_cpu_context *cpu, u32 usPSXMem,int iSize)
 {
  int i;
- u16 *ram16 = (u16 *)&psx_ram[0];
+ u16 *ram16 = (u16 *)&cpu->psx_ram[0];
 
  for(i=0;i<iSize;i++)
   {
@@ -64,10 +65,10 @@ EXPORT_GCC void CALLBACK SPU2readDMA4Mem(u32 usPSXMem,int iSize)
  spuStat2[0]=0x80;                                     // DMA complete
 }
 
-EXPORT_GCC void CALLBACK SPU2readDMA7Mem(u32 usPSXMem,int iSize)
+EXPORT_GCC void CALLBACK SPU2readDMA7Mem(mips_cpu_context *cpu, u32 usPSXMem,int iSize)
 {
  int i;
- u16 *ram16 = (u16 *)&psx_ram[0];
+ u16 *ram16 = (u16 *)&cpu->psx_ram[0];
 
  for(i=0;i<iSize;i++)
   {
@@ -98,10 +99,10 @@ EXPORT_GCC void CALLBACK SPU2readDMA7Mem(u32 usPSXMem,int iSize)
 // WRITE DMA (many values)
 ////////////////////////////////////////////////////////////////////////
 
-EXPORT_GCC void CALLBACK SPU2writeDMA4Mem(u32 usPSXMem,int iSize)
+EXPORT_GCC void CALLBACK SPU2writeDMA4Mem(mips_cpu_context *cpu, u32 usPSXMem,int iSize)
 {
  int i;
- u16 *ram16 = (u16 *)&psx_ram[0];
+ u16 *ram16 = (u16 *)&cpu->psx_ram[0];
 
  for(i=0;i<iSize;i++)
   {
@@ -117,10 +118,10 @@ EXPORT_GCC void CALLBACK SPU2writeDMA4Mem(u32 usPSXMem,int iSize)
  spuStat2[0]=0x80;                                     // DMA complete
 }
 
-EXPORT_GCC void CALLBACK SPU2writeDMA7Mem(u32 usPSXMem,int iSize)
+EXPORT_GCC void CALLBACK SPU2writeDMA7Mem(mips_cpu_context *cpu, u32 usPSXMem,int iSize)
 {
  int i;
- u16 *ram16 = (u16 *)&psx_ram[0];
+ u16 *ram16 = (u16 *)&cpu->psx_ram[0];
 
  for(i=0;i<iSize;i++)
   {
@@ -139,7 +140,7 @@ EXPORT_GCC void CALLBACK SPU2writeDMA7Mem(u32 usPSXMem,int iSize)
 // INTERRUPTS
 ////////////////////////////////////////////////////////////////////////
 
-void InterruptDMA4(void) 
+void InterruptDMA4(mips_cpu_context *cpu) 
 {
 // taken from linuzappz NULL spu2
 //	spu2Rs16(CORE0_ATTR)&= ~0x30;
@@ -151,12 +152,12 @@ void InterruptDMA4(void)
  spuStat2[0]|=0x80;
 }
                        
-EXPORT_GCC void CALLBACK SPU2interruptDMA4(void) 
+EXPORT_GCC void CALLBACK SPU2interruptDMA4(mips_cpu_context *cpu) 
 {
- InterruptDMA4();
+ InterruptDMA4(cpu);
 }
 
-void InterruptDMA7(void) 
+void InterruptDMA7(mips_cpu_context *cpu) 
 {
 // taken from linuzappz NULL spu2
 //	spu2Rs16(CORE1_ATTR)&= ~0x30;
@@ -168,8 +169,8 @@ void InterruptDMA7(void)
  spuStat2[1]|=0x80;
 }
 
-EXPORT_GCC void CALLBACK SPU2interruptDMA7(void) 
+EXPORT_GCC void CALLBACK SPU2interruptDMA7(mips_cpu_context *cpu) 
 {
- InterruptDMA7();
+ InterruptDMA7(cpu);
 }
 
diff --git a/plugins/ao/eng_psf/peops2/registers2.c b/plugins/ao/eng_psf/peops2/registers2.c
index 0f3a8242..7eec264b 100644
--- a/plugins/ao/eng_psf/peops2/registers2.c
+++ b/plugins/ao/eng_psf/peops2/registers2.c
@@ -45,6 +45,7 @@
 #include "../peops2/registers.h"
 #include "../peops2/regs.h"
 #include "../peops2/reverb.h"
+#include "../psx.h"
 
 /*
 // adsr time values (in ms) by James Higgs ... see the end of
@@ -75,7 +76,7 @@ void VolumeOn(int start,int end,unsigned short val,int iRight);
 // WRITE REGISTERS: called by main emu
 ////////////////////////////////////////////////////////////////////////
 
-EXPORT_GCC void CALLBACK SPU2write(unsigned long reg, unsigned short val)
+EXPORT_GCC void CALLBACK SPU2write(mips_cpu_context *cpu, unsigned long reg, unsigned short val)
 {
  long r=reg&0xffff;
 
@@ -786,7 +787,7 @@ EXPORT_GCC void CALLBACK SPU2write(unsigned long reg, unsigned short val)
 // READ REGISTER: called by main emu
 ////////////////////////////////////////////////////////////////////////
 
-EXPORT_GCC unsigned short CALLBACK SPU2read(unsigned long reg)
+EXPORT_GCC unsigned short CALLBACK SPU2read(mips_cpu_context *cpu, unsigned long reg)
 {
  long r=reg&0xffff;
 
@@ -906,13 +907,13 @@ EXPORT_GCC unsigned short CALLBACK SPU2read(unsigned long reg)
  return regArea[r>>1];
 }
 
-EXPORT_GCC void CALLBACK SPU2writePS1Port(unsigned long reg, unsigned short val)
+EXPORT_GCC void CALLBACK SPU2writePS1Port(mips_cpu_context *cpu, unsigned long reg, unsigned short val)
 {
  const u32 r=reg&0xfff;
 
  if(r>=0xc00 && r<0xd80)	// channel info
  {
- 	SPU2write(r-0xc00, val);
+ 	SPU2write(cpu, r-0xc00, val);
  	return;
  }
 
@@ -1070,13 +1071,13 @@ EXPORT_GCC void CALLBACK SPU2writePS1Port(unsigned long reg, unsigned short val)
    }
 }
 
-EXPORT_GCC unsigned short CALLBACK SPU2readPS1Port(unsigned long reg)
+EXPORT_GCC unsigned short CALLBACK SPU2readPS1Port(mips_cpu_context *cpu, unsigned long reg)
 {
  const u32 r=reg&0xfff;
 
  if(r>=0x0c00 && r<0x0d80)
   {
-  	return SPU2read(r-0xc00);
+  	return SPU2read(cpu, r-0xc00);
   }
 
  switch(r)
diff --git a/plugins/ao/eng_psf/peops2/regs.h b/plugins/ao/eng_psf/peops2/regs.h
index 2cacafe1..5136b77a 100644
--- a/plugins/ao/eng_psf/peops2/regs.h
+++ b/plugins/ao/eng_psf/peops2/regs.h
@@ -39,5 +39,5 @@ void SetPitch(int ch,unsigned short val);
 void ReverbOn(int start,int end,unsigned short val,int iRight);

 void SetReverbAddr(int core);

 

-EXPORT_GCC void CALLBACK SPU2write(unsigned long reg, unsigned short val);

+//EXPORT_GCC void CALLBACK SPU2write(unsigned long reg, unsigned short val);

 

diff --git a/plugins/ao/eng_psf/peops2/spu.h b/plugins/ao/eng_psf/peops2/spu.h
index 89e2e900..be69a4ea 100644
--- a/plugins/ao/eng_psf/peops2/spu.h
+++ b/plugins/ao/eng_psf/peops2/spu.h
@@ -26,14 +26,16 @@
 // - generic cleanup for the Peops release

 //

 //*************************************************************************//

+
+#include "../psx.h"
 

 

-void SetupTimer(void);

-void RemoveTimer(void);

-EXPORT_GCC void CALLBACK SPU2playADPCMchannel(xa_decode_t *xap);

+//void SetupTimer(mips_cpu_context *cpu);

+//void RemoveTimer(mips_cpu_context *cpu);

+//EXPORT_GCC void CALLBACK SPU2playADPCMchannel(mips_cpu_context *cpu, xa_decode_t *xap);

 

-EXPORT_GCC long CALLBACK SPU2init(void);

-EXPORT_GCC long CALLBACK SPU2open(void *pDsp);

-EXPORT_GCC void CALLBACK SPU2async(unsigned long cycle);

-EXPORT_GCC void CALLBACK SPU2close(void);
+EXPORT_GCC long CALLBACK SPU2init(mips_cpu_context *cpu, void (*callback)(unsigned char *, long, void *), void *data);
+EXPORT_GCC long CALLBACK SPU2open(mips_cpu_context *cpu, void *pDsp);

+EXPORT_GCC void CALLBACK SPU2async(mips_cpu_context *cpu, unsigned long cycle);

+EXPORT_GCC void CALLBACK SPU2close(mips_cpu_context *cpu);
 
diff --git a/plugins/ao/eng_psf/peops2/spu2.c b/plugins/ao/eng_psf/peops2/spu2.c
index ef04d3c4..4ae14247 100644
--- a/plugins/ao/eng_psf/peops2/spu2.c
+++ b/plugins/ao/eng_psf/peops2/spu2.c
@@ -102,6 +102,7 @@
 #include "../peops2/externals.h"
 #include "../peops2/regs.h"
 #include "../peops2/dma.h"
+#include "../peops2/spu.h"
  
 ////////////////////////////////////////////////////////////////////////
 // globals
@@ -168,8 +169,6 @@ static int lastch=-1;      // last channel processed on spu irq in timer mode
 static int lastns=0;       // last ns pos
 static int iSecureStart=0; // secure start counter
 
-extern void ps2_update(unsigned char *samples, long lBytes);
-
 ////////////////////////////////////////////////////////////////////////
 // CODE AREA
 ////////////////////////////////////////////////////////////////////////
@@ -359,7 +358,7 @@ void setlength2(s32 stop, s32 fade)
 
 int iSpuAsyncWait=0;
 
-static void *MAINThread(int samp2run)
+static void *MAINThread(mips_cpu_context *cpu, int samp2run)
 {
  int s_1,s_2,fa,voldiv=iVolume;
  unsigned char * start;unsigned int nSample;
@@ -762,7 +761,7 @@ ENDX:   ;
   // wanna have around 1/60 sec (16.666 ms) updates
 	if ((((unsigned char *)pS)-((unsigned char *)pSpuBuffer)) == (735*4))
 	{
-	    	ps2_update((u8*)pSpuBuffer,(u8*)pS-(u8*)pSpuBuffer);
+	    	cpu->spu_callback((u8*)pSpuBuffer,(u8*)pS-(u8*)pSpuBuffer, cpu->spu_callback_data);
 	        pS=(short *)pSpuBuffer;					  
 	}
  }
@@ -783,7 +782,7 @@ ENDX:   ;
 //  1 time every 'cycle' cycles... harhar
 ////////////////////////////////////////////////////////////////////////
 
-EXPORT_GCC void CALLBACK SPU2async(unsigned long cycle)
+EXPORT_GCC void CALLBACK SPU2async(mips_cpu_context *cpu, unsigned long cycle)
 {
  if(iSpuAsyncWait)
   {
@@ -792,7 +791,7 @@ EXPORT_GCC void CALLBACK SPU2async(unsigned long cycle)
    iSpuAsyncWait=0;
   }
 
-   MAINThread(0);                                      // -> linux high-compat mode
+   MAINThread(cpu, 0);                                      // -> linux high-compat mode
 }
 
 ////////////////////////////////////////////////////////////////////////
@@ -804,8 +803,10 @@ EXPORT_GCC void CALLBACK SPU2async(unsigned long cycle)
 ////////////////////////////////////////////////////////////////////////
 
               
-EXPORT_GCC long CALLBACK SPU2init(void)
+EXPORT_GCC long CALLBACK SPU2init(mips_cpu_context *cpu, void (*callback)(unsigned char *, long, void *), void *data)
 {
+    cpu->spu_callback = callback;
+    cpu->spu_callback_data = data;
  spuMemC=(unsigned char *)spuMem;                      // just small setup
  memset((void *)s_chan,0,MAXCHAN*sizeof(SPUCHAN));
  memset(rvb,0,2*sizeof(REVERBInfo));
@@ -821,7 +822,7 @@ EXPORT_GCC long CALLBACK SPU2init(void)
 // SETUPTIMER: init of certain buffers and threads/timers
 ////////////////////////////////////////////////////////////////////////
 
-static void SetupTimer(void)
+static void SetupTimer(mips_cpu_context *cpu)
 {
  memset(SSumR,0,NSSIZE*sizeof(int));                   // init some mixing buffers
  memset(SSumL,0,NSSIZE*sizeof(int));
@@ -836,7 +837,7 @@ static void SetupTimer(void)
 // REMOVETIMER: kill threads/timers
 ////////////////////////////////////////////////////////////////////////
 
-static void RemoveTimer(void)
+static void RemoveTimer(mips_cpu_context *cpu)
 {
  bEndThread=1;                                         // raise flag to end thread
  bThreadEnded=0;                                       // no more spu is running
@@ -847,7 +848,7 @@ static void RemoveTimer(void)
 // SETUPSTREAMS: init most of the spu buffers
 ////////////////////////////////////////////////////////////////////////
 
-static void SetupStreams(void)
+static void SetupStreams(mips_cpu_context *cpu)
 { 
  int i;
 
@@ -882,7 +883,7 @@ static void SetupStreams(void)
 // REMOVESTREAMS: free most buffer
 ////////////////////////////////////////////////////////////////////////
 
-static void RemoveStreams(void)
+static void RemoveStreams(mips_cpu_context *cpu)
 { 
  free(pSpuBuffer);                                     // free mixing buffer
  pSpuBuffer=NULL;
@@ -908,7 +909,7 @@ static void RemoveStreams(void)
 // SPUOPEN: called by main emu after init
 ////////////////////////////////////////////////////////////////////////
    
-EXPORT_GCC long CALLBACK SPU2open(void *pDsp)                          
+EXPORT_GCC long CALLBACK SPU2open(mips_cpu_context *cpu, void *pDsp)                          
 {
  if(bSPUIsOpen) return 0;                              // security for some stupid main emus
 
@@ -942,9 +943,9 @@ EXPORT_GCC long CALLBACK SPU2open(void *pDsp)
  
 // SetupSound();                                         // setup midas (before init!)
 
- SetupStreams();                                       // prepare streaming
+ SetupStreams(cpu);                                       // prepare streaming
 
- SetupTimer();                                         // timer for feeding data
+ SetupTimer(cpu);                                         // timer for feeding data
 
  bSPUIsOpen=1;
 
@@ -957,17 +958,17 @@ EXPORT_GCC long CALLBACK SPU2open(void *pDsp)
 // SPUCLOSE: called before shutdown
 ////////////////////////////////////////////////////////////////////////
 
-EXPORT_GCC void CALLBACK SPU2close(void)
+EXPORT_GCC void CALLBACK SPU2close(mips_cpu_context *cpu)
 {
  if(!bSPUIsOpen) return;                               // some security
 
  bSPUIsOpen=0;                                         // no more open
 
- RemoveTimer();                                        // no more feeding
+ RemoveTimer(cpu);                                        // no more feeding
 
-// RemoveSound();                                        // no more sound handling
+// RemoveSound(cpu);                                        // no more sound handling
 
- RemoveStreams();                                      // no more streaming
+ RemoveStreams(cpu);                                      // no more streaming
 }
 
 ////////////////////////////////////////////////////////////////////////
diff --git a/plugins/ao/eng_psf/psx.h b/plugins/ao/eng_psf/psx.h
index 400ca3b5..5674553a 100644
--- a/plugins/ao/eng_psf/psx.h
+++ b/plugins/ao/eng_psf/psx.h
@@ -2,6 +2,7 @@
 #define _MIPS_H
 
 #include "ao.h"
+#include "osd_cpu.h"
 //#include "driver.h"
 
 typedef void genf(void);
@@ -78,6 +79,16 @@ typedef struct mips_cpu_context_s
 	PAIR cp2dr[ 32 ];
 	int (*irq_callback)(struct mips_cpu_context_s *cpu, int irqline);
     int mips_ICount;
+    // PSX main RAM
+    uint32 psx_ram[(2*1024*1024)/4];
+    uint32 psx_scratch[0x400];
+    // backup image to restart songs
+    uint32 initial_ram[(2*1024*1024)/4];
+    uint32 initial_scratch[0x400];
+
+    // spu callback
+    void (*spu_callback)(unsigned char *, long, void *);
+    void *spu_callback_data;
 } mips_cpu_context;
 
 union cpuinfo
@@ -296,11 +307,11 @@ enum
 #define CF_RFE ( 16 )
 
 #ifdef MAME_DEBUG
-extern unsigned DasmMIPS(char *buff, unsigned _pc);
+unsigned DasmMIPS(char *buff, unsigned _pc);
 #endif
 
 #if (HAS_PSXCPU)
-extern void psxcpu_get_info(mips_cpu_context *cpu, UINT32 state, union cpuinfo *info);
+void psxcpu_get_info(mips_cpu_context *cpu, UINT32 state, union cpuinfo *info);
 #endif
 
 mips_cpu_context *mips_alloc(void);
@@ -316,16 +327,18 @@ int mips_execute( mips_cpu_context *cpu, int cycles );
 int mips_get_icount(mips_cpu_context *cpu);
 void mips_set_icount(mips_cpu_context *cpu, int count);
 
+uint32 mips_get_cause(mips_cpu_context *cpu);
+uint32 mips_get_status(mips_cpu_context *cpu);
+void mips_set_status(mips_cpu_context *cpu, uint32 status);
+uint32 mips_get_ePC(mips_cpu_context *cpu);
+
+
 void psx_hw_init(mips_cpu_context *cpu);
 void psx_hw_slice(mips_cpu_context *cpu);
 void psx_hw_frame(mips_cpu_context *cpu);
 void ps2_hw_slice(mips_cpu_context *cpu);
 void ps2_hw_frame(mips_cpu_context *cpu);
 
-uint16 SPUreadRegister(uint32 reg);
-void SPUwriteRegister(uint32 reg, uint16 val);
-void SPUwriteDMAMem(uint32 usPSXMem,int iSize);
-void SPUreadDMAMem(uint32 usPSXMem,int iSize);
 void mips_shorten_frame(mips_cpu_context *cpu);
 uint32 psf2_load_file(mips_cpu_context *cpu, char *file, uint8 *buf, uint32 buflen);
 uint32 psf2_load_elf(mips_cpu_context *cpu, uint8 *start, uint32 len);
@@ -341,4 +354,14 @@ void program_write_byte_32le(mips_cpu_context *cpu, offs_t address, uint8 data);
 void program_write_word_32le(mips_cpu_context *cpu, offs_t address, uint16 data);
 void program_write_dword_32le(mips_cpu_context *cpu, offs_t address, uint32 data);
 
+// SPU2
+void SPU2write(mips_cpu_context *cpu, unsigned long reg, unsigned short val);
+unsigned short SPU2read(mips_cpu_context *cpu, unsigned long reg);
+void SPU2readDMA4Mem(mips_cpu_context *cpu, uint32 usPSXMem,int iSize);
+void SPU2writeDMA4Mem(mips_cpu_context *cpu, uint32 usPSXMem,int iSize);
+void SPU2readDMA7Mem(mips_cpu_context *cpu, uint32 usPSXMem,int iSize);
+void SPU2writeDMA7Mem(mips_cpu_context *cpu, uint32 usPSXMem,int iSize);
+void SPU2interruptDMA4(mips_cpu_context *cpu);
+void SPU2interruptDMA7(mips_cpu_context *cpu);
+
 #endif
diff --git a/plugins/ao/eng_psf/psx_hw.c b/plugins/ao/eng_psf/psx_hw.c
index a699cf26..d81d59a9 100644
--- a/plugins/ao/eng_psf/psx_hw.c
+++ b/plugins/ao/eng_psf/psx_hw.c
@@ -50,6 +50,8 @@
 #include "ao.h"
 #include "cpuintrf.h"
 #include "psx.h"
+#include "peops/spu.h"
+#include "peops/regs.h"
 	
 #define DEBUG_HLE_BIOS	(0)		// debug PS1 HLE BIOS
 #define DEBUG_HLE_IOP	(0)		// debug PS2 IOP OS calls
@@ -59,16 +61,6 @@
 extern int psf_refresh;
 extern int psxcpu_verbose;
 
-// SPU2
-extern void SPU2write(unsigned long reg, unsigned short val);
-extern unsigned short SPU2read(unsigned long reg);
-extern void SPU2readDMA4Mem(uint32 usPSXMem,int iSize);
-extern void SPU2writeDMA4Mem(uint32 usPSXMem,int iSize);
-extern void SPU2readDMA7Mem(uint32 usPSXMem,int iSize);
-extern void SPU2writeDMA7Mem(uint32 usPSXMem,int iSize);
-extern void SPU2interruptDMA4(void);
-extern void SPU2interruptDMA7(void);
-
 #define MAX_FILE_SLOTS	(32)
 
 static volatile int softcall_target = 0;
@@ -215,13 +207,6 @@ static EvtCtrlBlk *CounterEvent;
 #define EvMdINTR	0x1000
 #define EvMdNOINTR	0x2000
 
-// PSX main RAM
-uint32 psx_ram[(2*1024*1024)/4];
-uint32 psx_scratch[0x400];
-// backup image to restart songs
-uint32 initial_ram[(2*1024*1024)/4];
-uint32 initial_scratch[0x400];
-
 static uint32 spu_delay, dma_icr, irq_data, irq_mask, dma_timer, WAI;
 static uint32 dma4_madr, dma4_bcr, dma4_chcr, dma4_delay;
 static uint32 dma7_madr, dma7_bcr, dma7_chcr, dma7_delay;
@@ -457,18 +442,18 @@ void psx_irq_set(mips_cpu_context *cpu, uint32 irq)
 
 static uint32 gpu_stat = 0;
 
-uint32 psx_hw_read(offs_t offset, uint32 mem_mask)
+uint32 psx_hw_read(mips_cpu_context *cpu, offs_t offset, uint32 mem_mask)
 {
 	if (offset >= 0x00000000 && offset <= 0x007fffff)
 	{
 		offset &= 0x1fffff;
-		return LE32(psx_ram[offset>>2]);
+		return LE32(cpu->psx_ram[offset>>2]);
 	}
 
 	if (offset >= 0x80000000 && offset <= 0x807fffff)
 	{
 		offset &= 0x1fffff;
-		return LE32(psx_ram[offset>>2]);
+		return LE32(cpu->psx_ram[offset>>2]);
 	}
 
 	if (offset == 0xbfc00180 || offset == 0xbfc00184)	// exception vector
@@ -496,11 +481,11 @@ uint32 psx_hw_read(offs_t offset, uint32 mem_mask)
 	{
 		if ((mem_mask == 0xffff0000) || (mem_mask == 0xffffff00))
 		{
-			return SPUreadRegister(offset) & ~mem_mask;
+			return SPUreadRegister(cpu, offset) & ~mem_mask;
 		}
 		else if (mem_mask == 0x0000ffff)
 		{
-			return SPUreadRegister(offset)<<16;
+			return SPUreadRegister(cpu, offset)<<16;
 		}
 		else printf("SPU: read unknown mask %08x\n", mem_mask);
 	}
@@ -509,15 +494,15 @@ uint32 psx_hw_read(offs_t offset, uint32 mem_mask)
 	{
 		if ((mem_mask == 0xffff0000) || (mem_mask == 0xffffff00))
 		{
-			return SPU2read(offset) & ~mem_mask;
+			return SPU2read(cpu, offset) & ~mem_mask;
 		}
 		else if (mem_mask == 0x0000ffff)
 		{
-			return SPU2read(offset)<<16;
+			return SPU2read(cpu, offset)<<16;
 		}
 		else if (mem_mask == 0)
 		{
-			return SPU2read(offset) | SPU2read(offset+2)<<16;
+			return SPU2read(cpu, offset) | SPU2read(cpu, offset+2)<<16;
 		}
 		else printf("SPU2: read unknown mask %08x\n", mem_mask);
 	}
@@ -573,30 +558,30 @@ uint32 psx_hw_read(offs_t offset, uint32 mem_mask)
 	{
 		union cpuinfo mipsinfo;
 
-		mips_get_info(CPUINFO_INT_PC, &mipsinfo);
+		mips_get_info(cpu, CPUINFO_INT_PC, &mipsinfo);
 		printf("Unknown read: %08x, mask %08x (PC=%x)\n", offset&~3, mem_mask, mipsinfo.i);
 	}
 	#endif
 	return 0;
 }
 
-static void psx_dma4(uint32 madr, uint32 bcr, uint32 chcr)
+static void psx_dma4(mips_cpu_context *cpu, uint32 madr, uint32 bcr, uint32 chcr)
 {
 	if (chcr == 0x01000201)	// cpu to SPU
 	{
 //		printf("DMA4: RAM %08x to SPU\n", madr);
 		bcr = (bcr>>16) * (bcr & 0xffff) * 2;
-		SPUwriteDMAMem(madr&0x1fffff, bcr);
+		SPUwriteDMAMem(cpu, madr&0x1fffff, bcr);
 	}
 	else
 	{
 //		printf("DMA4: SPU to RAM %08x\n", madr);
 		bcr = (bcr>>16) * (bcr & 0xffff) * 2;
-		SPUreadDMAMem(madr&0x1fffff, bcr);
+		SPUreadDMAMem(cpu, madr&0x1fffff, bcr);
 	}
 }
 
-static void ps2_dma4(uint32 madr, uint32 bcr, uint32 chcr)
+static void ps2_dma4(mips_cpu_context *cpu, uint32 madr, uint32 bcr, uint32 chcr)
 {
 	if (chcr == 0x01000201)	// cpu to SPU2
 	{
@@ -604,7 +589,7 @@ static void ps2_dma4(uint32 madr, uint32 bcr, uint32 chcr)
 		printf("DMA4: RAM %08x to SPU2\n", madr);
 		#endif
 		bcr = (bcr>>16) * (bcr & 0xffff) * 4;
-		SPU2writeDMA4Mem(madr&0x1fffff, bcr);
+		SPU2writeDMA4Mem(cpu, madr&0x1fffff, bcr);
 	}
 	else
 	{
@@ -612,13 +597,13 @@ static void ps2_dma4(uint32 madr, uint32 bcr, uint32 chcr)
 		printf("DMA4: SPU2 to RAM %08x\n", madr);
 		#endif
 		bcr = (bcr>>16) * (bcr & 0xffff) * 4;
-		SPU2readDMA4Mem(madr&0x1fffff, bcr);
+		SPU2readDMA4Mem(cpu, madr&0x1fffff, bcr);
 	}
 
 	dma4_delay = 80;
 }
 
-static void ps2_dma7(uint32 madr, uint32 bcr, uint32 chcr)
+static void ps2_dma7(mips_cpu_context *cpu, uint32 madr, uint32 bcr, uint32 chcr)
 {
 	if ((chcr == 0x01000201) || (chcr == 0x00100010) || (chcr == 0x000f0010) || (chcr == 0x00010010))	// cpu to SPU2
 	{
@@ -626,7 +611,7 @@ static void ps2_dma7(uint32 madr, uint32 bcr, uint32 chcr)
 		printf("DMA7: RAM %08x to SPU2\n", madr);
 		#endif
 		bcr = (bcr>>16) * (bcr & 0xffff) * 4;
-		SPU2writeDMA7Mem(madr&0x1fffff, bcr);
+		SPU2writeDMA7Mem(cpu, madr&0x1fffff, bcr);
 	}
 	else
 	{
@@ -651,8 +636,8 @@ void psx_hw_write(mips_cpu_context *cpu, offs_t offset, uint32 data, uint32 mem_
 
 		mips_get_info(cpu, CPUINFO_INT_PC, &mipsinfo);
 
-		psx_ram[offset>>2] &= LE32(mem_mask);
-		psx_ram[offset>>2] |= LE32(data);
+		cpu->psx_ram[offset>>2] &= LE32(mem_mask);
+		cpu->psx_ram[offset>>2] |= LE32(data);
 		return;
 	}
 
@@ -661,8 +646,8 @@ void psx_hw_write(mips_cpu_context *cpu, offs_t offset, uint32 data, uint32 mem_
 		offset &= 0x1fffff;
 //		if (offset < 0x10000) printf("Write %x to kernel @ %x\n", data, offset);
 		mips_get_info(cpu, CPUINFO_INT_PC, &mipsinfo);
-		psx_ram[offset>>2] &= LE32(mem_mask);
-		psx_ram[offset>>2] |= LE32(data);
+		cpu->psx_ram[offset>>2] &= LE32(mem_mask);
+		cpu->psx_ram[offset>>2] |= LE32(data);
 		return;
 	}
 
@@ -678,12 +663,12 @@ void psx_hw_write(mips_cpu_context *cpu, offs_t offset, uint32 data, uint32 mem_
 	  //		printf("SPU2 wrote %x to SPU1 address %x!\n", data, offset);
 		if (mem_mask == 0xffff0000)
 		{
-			SPUwriteRegister(offset, data);
+			SPUwriteRegister(cpu, offset, data);
 			return;
 		}
 		else if (mem_mask == 0x0000ffff)
 		{
-			SPUwriteRegister(offset, data>>16);
+			SPUwriteRegister(cpu, offset, data>>16);
 			return;
 		}
 		else printf("SPU: write unknown mask %08x\n", mem_mask);
@@ -693,18 +678,18 @@ void psx_hw_write(mips_cpu_context *cpu, offs_t offset, uint32 data, uint32 mem_
 	{
 		if (mem_mask == 0xffff0000)
 		{
-			SPU2write(offset, data);
+			SPU2write(cpu, offset, data);
 			return;
 		}
 		else if (mem_mask == 0x0000ffff)
 		{
-			SPU2write(offset, data>>16);
+			SPU2write(cpu, offset, data>>16);
 			return;
 		}
 		else if (mem_mask == 0)
 		{
-			SPU2write(offset, data & 0xffff);
-			SPU2write(offset+2, data>>16);
+			SPU2write(cpu, offset, data & 0xffff);
+			SPU2write(cpu, offset+2, data>>16);
 			return;
 		}
 		else printf("SPU2: write unknown mask %08x\n", mem_mask);
@@ -747,7 +732,7 @@ void psx_hw_write(mips_cpu_context *cpu, offs_t offset, uint32 data, uint32 mem_
 	else if (offset == 0x1f8010c8)
 	{
 		dma4_chcr = data;
-		psx_dma4(dma4_madr, dma4_bcr, dma4_chcr);
+		psx_dma4(cpu, dma4_madr, dma4_bcr, dma4_chcr);
 
 		if (dma_icr & (1 << (16+4)))
 		{
@@ -792,7 +777,7 @@ void psx_hw_write(mips_cpu_context *cpu, offs_t offset, uint32 data, uint32 mem_
 	else if (offset == 0xbf8010c8)
 	{
 		dma4_chcr = data;
-		ps2_dma4(dma4_madr, dma4_bcr, dma4_chcr);
+		ps2_dma4(cpu, dma4_madr, dma4_bcr, dma4_chcr);
 
 		if (dma_icr & (1 << (16+4)))
 		{
@@ -817,7 +802,7 @@ void psx_hw_write(mips_cpu_context *cpu, offs_t offset, uint32 data, uint32 mem_
 	else if (offset == 0xbf801504)
 	{
 		dma7_chcr = data;
-		ps2_dma7(dma7_madr, dma7_bcr, dma7_chcr);
+		ps2_dma7(cpu, dma7_madr, dma7_bcr, dma7_chcr);
 		return;
 	}
 							 
@@ -924,11 +909,6 @@ enum
 
 static uint32 heap_addr, entry_int = 0;
 
-extern uint32 mips_get_cause(void);
-extern uint32 mips_get_status(void);
-extern void mips_set_status(uint32 status);
-extern uint32 mips_get_ePC(void);
-
 static uint32 irq_regs[37];
 
 static int irq_mutex = 0;
@@ -978,7 +958,7 @@ static void call_irq_routine(mips_cpu_context *cpu, uint32 routine, uint32 param
 	mips_set_info(cpu, CPUINFO_INT_REGISTER + MIPS_R31, &mipsinfo);
 
 	// make sure we're set
-	psx_ram[0x1000/4] = LE32(FUNCT_HLECALL);
+	cpu->psx_ram[0x1000/4] = LE32(FUNCT_HLECALL);
 
 	softcall_target = 0;
 	oldICount = mips_get_icount(cpu);
@@ -1021,7 +1001,7 @@ void psx_bios_exception(mips_cpu_context *cpu, uint32 pc)
 	mips_get_info(cpu, CPUINFO_INT_REGISTER + MIPS_R4, &mipsinfo);
 	a0 = mipsinfo.i;
 
-	switch (mips_get_cause() & 0x3c)
+	switch (mips_get_cause(cpu) & 0x3c)
 	{
 		case 0:	// IRQ
 //			printf("IRQ: %x, mask %x\n", irq_data, irq_mask);
@@ -1050,7 +1030,7 @@ void psx_bios_exception(mips_cpu_context *cpu, uint32 pc)
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R31, &mipsinfo);
 				
 					// make sure we're set
-					psx_ram[0x1000/4] = LE32(FUNCT_HLECALL);
+					cpu->psx_ram[0x1000/4] = LE32(FUNCT_HLECALL);
 		
 					softcall_target = 0;
 					oldICount = mips_get_icount(cpu);
@@ -1082,7 +1062,7 @@ void psx_bios_exception(mips_cpu_context *cpu, uint32 pc)
 							mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R31, &mipsinfo);
 							
 							// make sure we're set
-							psx_ram[0x1000/4] = LE32(FUNCT_HLECALL);
+							cpu->psx_ram[0x1000/4] = LE32(FUNCT_HLECALL);
 					
 							softcall_target = 0;
 							oldICount = mips_get_icount(cpu);
@@ -1112,25 +1092,25 @@ void psx_bios_exception(mips_cpu_context *cpu, uint32 pc)
 //				printf("taking entry_int\n");
 
 				// RA (and PC)
-				mipsinfo.i = LE32(psx_ram[((a0&0x1fffff)+0)/4]);
+				mipsinfo.i = LE32(cpu->psx_ram[((a0&0x1fffff)+0)/4]);
 				mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R31, &mipsinfo);
 				mips_set_info(cpu,CPUINFO_INT_PC, &mipsinfo);
 				// SP
-				mipsinfo.i = LE32(psx_ram[((a0&0x1fffff)+4)/4]);
+				mipsinfo.i = LE32(cpu->psx_ram[((a0&0x1fffff)+4)/4]);
 				mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R29, &mipsinfo);
 				// FP
-				mipsinfo.i = LE32(psx_ram[((a0&0x1fffff)+8)/4]);
+				mipsinfo.i = LE32(cpu->psx_ram[((a0&0x1fffff)+8)/4]);
 				mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R30, &mipsinfo);
 
 				// S0-S7 are next
 				for (i = 0; i < 8; i++)
 				{
-					mipsinfo.i = LE32(psx_ram[((a0&0x1fffff)+12+(i*4))/4]);
+					mipsinfo.i = LE32(cpu->psx_ram[((a0&0x1fffff)+12+(i*4))/4]);
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R16 + i, &mipsinfo);
 				}
 
 				// GP
-				mipsinfo.i = LE32(psx_ram[((a0&0x1fffff)+44)/4]);
+				mipsinfo.i = LE32(cpu->psx_ram[((a0&0x1fffff)+44)/4]);
 				mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R28, &mipsinfo);
 
 				// v0 = 1
@@ -1152,18 +1132,18 @@ void psx_bios_exception(mips_cpu_context *cpu, uint32 pc)
 				mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_HI, &mipsinfo);
 				mipsinfo.i = irq_regs[33];
 				mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_LO, &mipsinfo);
-				mipsinfo.i = mips_get_ePC();
+				mipsinfo.i = mips_get_ePC(cpu);
 				mips_set_info(cpu,CPUINFO_INT_PC, &mipsinfo);
 
-				status = mips_get_status();
+				status = mips_get_status(cpu);
 				status = (status & 0xfffffff0) | ((status & 0x3c)>>2);
-				mips_set_status(status);
+				mips_set_status(cpu, status);
 			}
 			break;
 
 		case 0x20:	// syscall
 			// syscall always farks with the status, so get it now
-			status = mips_get_status();
+			status = mips_get_status(cpu);
 
 			switch (a0)
 			{
@@ -1189,12 +1169,12 @@ void psx_bios_exception(mips_cpu_context *cpu, uint32 pc)
 			}
 
 			// PC = ePC + 4
-			mipsinfo.i = mips_get_ePC() + 4;
+			mipsinfo.i = mips_get_ePC(cpu) + 4;
 			mips_set_info(cpu,CPUINFO_INT_PC, &mipsinfo);
 
 			// and update the status accordingly
 			status = (status & 0xfffffff0) | ((status & 0x3c)>>2);
-			mips_set_status(status);
+			mips_set_status(cpu, status);
 			break;
 
 		default:
@@ -1280,11 +1260,11 @@ void psx_hw_init(mips_cpu_context *cpu)
 	iNumTimers = 0;
 
 	// set PS1 BIOS HLE breakpoints
-	psx_ram[0xa0/4] = LE32(FUNCT_HLECALL);
-	psx_ram[0xb0/4] = LE32(FUNCT_HLECALL);
-	psx_ram[0xc0/4] = LE32(FUNCT_HLECALL);
+	cpu->psx_ram[0xa0/4] = LE32(FUNCT_HLECALL);
+	cpu->psx_ram[0xb0/4] = LE32(FUNCT_HLECALL);
+	cpu->psx_ram[0xc0/4] = LE32(FUNCT_HLECALL);
 
-	Event = (EvtCtrlBlk *)&psx_ram[0x1000/4];
+	Event = (EvtCtrlBlk *)&cpu->psx_ram[0x1000/4];
 	CounterEvent = (Event + (32*2));
 
 	dma_icr = 0;
@@ -1361,27 +1341,27 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 				case 0x13:	// setjmp
 					// RA
 					mips_get_info(cpu, CPUINFO_INT_REGISTER + MIPS_R31, &mipsinfo);
-					psx_ram[((a0&0x1fffff)+0)/4] = LE32(mipsinfo.i);
+					cpu->psx_ram[((a0&0x1fffff)+0)/4] = LE32(mipsinfo.i);
 					#if DEBUG_HLE_BIOS
 					printf("HLEBIOS: setjmp(%08x) => PC %08x\n", a0, mipsinfo.i);
 					#endif
 					// SP
 					mips_get_info(cpu, CPUINFO_INT_REGISTER + MIPS_R29, &mipsinfo);
-					psx_ram[((a0&0x1fffff)+4)/4] = LE32(mipsinfo.i);
+					cpu->psx_ram[((a0&0x1fffff)+4)/4] = LE32(mipsinfo.i);
 					// FP
 					mips_get_info(cpu, CPUINFO_INT_REGISTER + MIPS_R30, &mipsinfo);
-					psx_ram[((a0&0x1fffff)+8)/4] = LE32(mipsinfo.i);
+					cpu->psx_ram[((a0&0x1fffff)+8)/4] = LE32(mipsinfo.i);
 
 					// S0-S7 are next
 					for (i = 0; i < 8; i++)
 					{
 						mips_get_info(cpu, CPUINFO_INT_REGISTER + MIPS_R16 + i, &mipsinfo);
-						psx_ram[((a0&0x1fffff)+12+(i*4))/4] = LE32(mipsinfo.i);
+						cpu->psx_ram[((a0&0x1fffff)+12+(i*4))/4] = LE32(mipsinfo.i);
 					}
 
 					// GP
 					mips_get_info(cpu, CPUINFO_INT_REGISTER + MIPS_R28, &mipsinfo);
-					psx_ram[((a0&0x1fffff)+44)/4] = LE32(mipsinfo.i);
+					cpu->psx_ram[((a0&0x1fffff)+44)/4] = LE32(mipsinfo.i);
 
 					// v0 = 0
 					mipsinfo.i = 0;
@@ -1396,8 +1376,8 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 						printf("HLEBIOS: strncmp(%08x, %08x, %d)\n", a0, a1, a2);
 						#endif
 
-						dst = (uint8 *)psx_ram;
-						src = (uint8 *)psx_ram;
+						dst = (uint8 *)cpu->psx_ram;
+						src = (uint8 *)cpu->psx_ram;
 						dst += (a0 & 0x1fffff);
 						src += (a1 & 0x1fffff);
 
@@ -1415,8 +1395,8 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 						printf("HLEBIOS: strcpy(%08x, %08x)\n", a0, a1);
 						#endif
 
-						dst = (uint8 *)psx_ram;
-						src = (uint8 *)psx_ram;
+						dst = (uint8 *)cpu->psx_ram;
+						src = (uint8 *)cpu->psx_ram;
 						dst += (a0 & 0x1fffff);
 						src += (a1 & 0x1fffff);
 
@@ -1441,7 +1421,7 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 						printf("HLEBIOS: bzero(%08x, %08x)\n", a0, a1);
 						#endif
 
-						dst = (uint8 *)psx_ram;
+						dst = (uint8 *)cpu->psx_ram;
 						dst += (a0 & 0x1fffff);
 						memset(dst, 0, a1);
 					}
@@ -1455,8 +1435,8 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 						printf("HLEBIOS: memcpy(%08x, %08x, %08x)\n", a0, a1, a2);
 						#endif
 
-						dst = (uint8 *)psx_ram;
-						src = (uint8 *)psx_ram;
+						dst = (uint8 *)cpu->psx_ram;
+						src = (uint8 *)cpu->psx_ram;
 						dst += (a0 & 0x1fffff);
 						src += (a1 & 0x1fffff);
 
@@ -1482,7 +1462,7 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 						printf("HLEBIOS: memset(%08x, %08x, %08x)\n", a0, a1, a2);
 						#endif
 
-						dst = (uint8 *)psx_ram;
+						dst = (uint8 *)cpu->psx_ram;
 						dst += (a0 & 0x1fffff);
 
 						while (a2)
@@ -1526,22 +1506,22 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 						chunk = heap_addr;
 
 						// find a free block that's big enough
-						while ((a0 > LE32(psx_ram[(chunk+BLK_SIZE)/4])) ||
-						       (LE32(psx_ram[(chunk+BLK_STAT)/4]) ==  1))
+						while ((a0 > LE32(cpu->psx_ram[(chunk+BLK_SIZE)/4])) ||
+						       (LE32(cpu->psx_ram[(chunk+BLK_STAT)/4]) ==  1))
 						{
-							chunk = LE32(psx_ram[(chunk+BLK_FD)]);
+							chunk = LE32(cpu->psx_ram[(chunk+BLK_FD)]);
 						}
 
 						// split free block
 						fd = chunk + 16 + a0;	// free block starts after block record and allocation size
-						psx_ram[(fd+BLK_STAT)/4] = psx_ram[(chunk+BLK_STAT)/4];
-						psx_ram[(fd+BLK_SIZE)/4] = LE32(LE32(psx_ram[(chunk+BLK_SIZE)/4]) - a0);
-						psx_ram[(fd+BLK_FD)/4] = psx_ram[(chunk+BLK_FD)/4]; 
-						psx_ram[(fd+BLK_BK)/4] = chunk;
+						cpu->psx_ram[(fd+BLK_STAT)/4] = cpu->psx_ram[(chunk+BLK_STAT)/4];
+						cpu->psx_ram[(fd+BLK_SIZE)/4] = LE32(LE32(cpu->psx_ram[(chunk+BLK_SIZE)/4]) - a0);
+						cpu->psx_ram[(fd+BLK_FD)/4] = cpu->psx_ram[(chunk+BLK_FD)/4]; 
+						cpu->psx_ram[(fd+BLK_BK)/4] = chunk;
 
-						psx_ram[(chunk+BLK_STAT)/4] = LE32(1);
-						psx_ram[(chunk+BLK_SIZE)/4] = LE32(a0);
-						psx_ram[(chunk+BLK_FD)/4] = LE32(fd);
+						cpu->psx_ram[(chunk+BLK_STAT)/4] = LE32(1);
+						cpu->psx_ram[(chunk+BLK_SIZE)/4] = LE32(a0);
+						cpu->psx_ram[(chunk+BLK_FD)/4] = LE32(fd);
 
 						mipsinfo.i = chunk + 16;
 						mipsinfo.i |= 0x80000000;
@@ -1560,24 +1540,24 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 
 					heap_addr = a0 & 0x3fffffff;
 
-					psx_ram[(heap_addr+BLK_STAT)/4] = LE32(0);
-					psx_ram[(heap_addr+BLK_FD)/4] = LE32(0);
-					psx_ram[(heap_addr+BLK_BK)/4] = LE32(0);
+					cpu->psx_ram[(heap_addr+BLK_STAT)/4] = LE32(0);
+					cpu->psx_ram[(heap_addr+BLK_FD)/4] = LE32(0);
+					cpu->psx_ram[(heap_addr+BLK_BK)/4] = LE32(0);
 
 					// if heap size out of range, clamp it
 					if (((a0 & 0x1fffff) + a1) >= 2*1024*1024)
 					{
-						psx_ram[(heap_addr+BLK_SIZE)/4] = LE32(0x1ffffc - (a0 & 0x1fffff));
+						cpu->psx_ram[(heap_addr+BLK_SIZE)/4] = LE32(0x1ffffc - (a0 & 0x1fffff));
 					}
 					else
 					{
-						psx_ram[(heap_addr+BLK_SIZE)/4] = LE32(a1);
+						cpu->psx_ram[(heap_addr+BLK_SIZE)/4] = LE32(a1);
 					}
 					break;
 
 				case 0x3f:	// printf
 					#if DEBUG_HLE_BIOS
-					printf("HLEBIOS: printf(%08x) = %s\n", a0, &psx_ram[(a0&0x1fffff)/4]);
+					printf("HLEBIOS: printf(%08x) = %s\n", a0, &cpu->psx_ram[(a0&0x1fffff)/4]);
 					#endif
 					break;
 
@@ -1761,14 +1741,14 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_HI, &mipsinfo);
 					mipsinfo.i = irq_regs[33];
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_LO, &mipsinfo);
-					mipsinfo.i = mips_get_ePC();
+					mipsinfo.i = mips_get_ePC(cpu);
 //					printf("ReturnFromException: IRQ state %x\n", irq_data & irq_mask);
 //					printf("HLEBIOS: ReturnFromException, cause = %08x, PC = %08x\n", mips_get_cause(), mipsinfo.i);
 					mips_set_info(cpu,CPUINFO_INT_PC, &mipsinfo);
 
-					status = mips_get_status();
+					status = mips_get_status(cpu);
 					status = (status & 0xfffffff0) | ((status & 0x3c)>>2);
-					mips_set_status(status);
+					mips_set_status(cpu, status);
 					return;	// force return to avoid PC=RA below
 					break;
 
@@ -1806,11 +1786,11 @@ void psx_bios_hle(mips_cpu_context *cpu, uint32 pc)
 					#endif
 
 					// v0 = (a0*4)+0x8600
-					mipsinfo.i = LE32(psx_ram[((a0<<2) + 0x8600)/4]);
+					mipsinfo.i = LE32(cpu->psx_ram[((a0<<2) + 0x8600)/4]);
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R2, &mipsinfo);
 
 					// (a0*4)+0x8600 = a1;
-					psx_ram[((a0<<2) + 0x8600)/4] = LE32(a1);
+					cpu->psx_ram[((a0<<2) + 0x8600)/4] = LE32(a1);
 					break;
 			      
 				default:
@@ -1843,7 +1823,7 @@ void psx_hw_runcounters(mips_cpu_context *cpu)
 
 			if (dma4_delay == 0)
 			{
-				SPU2interruptDMA4();
+				SPU2interruptDMA4(cpu);
 
 				if (dma4_cb)
 				{
@@ -1858,7 +1838,7 @@ void psx_hw_runcounters(mips_cpu_context *cpu)
 
 			if (dma7_delay == 0)
 			{
-				SPU2interruptDMA7();
+				SPU2interruptDMA7(cpu);
 
 				if (dma7_cb)
 				{
@@ -1955,16 +1935,16 @@ uint8 program_read_byte_32le(mips_cpu_context *cpu, offs_t address)
 	switch (address & 0x3)
 	{
 		case 0:
-			return psx_hw_read(address, 0xffffff00);
+			return psx_hw_read(cpu, address, 0xffffff00);
 			break;
 		case 1:
-			return psx_hw_read(address, 0xffff00ff)>>8;
+			return psx_hw_read(cpu, address, 0xffff00ff)>>8;
 			break;
 		case 2:
-			return psx_hw_read(address, 0xff00ffff)>>16;
+			return psx_hw_read(cpu, address, 0xff00ffff)>>16;
 			break;
 		case 3:
-			return psx_hw_read(address, 0x00ffffff)>>24;
+			return psx_hw_read(cpu, address, 0x00ffffff)>>24;
 			break;
 	}
 	return 0;
@@ -1973,14 +1953,14 @@ uint8 program_read_byte_32le(mips_cpu_context *cpu, offs_t address)
 uint16 program_read_word_32le(mips_cpu_context *cpu, offs_t address)
 {
 	if (address & 2)
-		return psx_hw_read(address, 0x0000ffff)>>16;
+		return psx_hw_read(cpu, address, 0x0000ffff)>>16;
 
-	return psx_hw_read(address, 0xffff0000);
+	return psx_hw_read(cpu, address, 0xffff0000);
 }
 
 uint32 program_read_dword_32le(mips_cpu_context *cpu, offs_t address)
 {
-	return psx_hw_read(address, 0);
+	return psx_hw_read(cpu, address, 0);
 }
 
 void program_write_byte_32le(mips_cpu_context *cpu, offs_t address, uint8 data)
@@ -2093,7 +2073,7 @@ static void iop_sprintf(mips_cpu_context *cpu, char *out, char *fmt, uint32 psta
 				mips_get_info(cpu, curparm, &mipsinfo);
 				curparm++;
 
-				pstr = (char *)psx_ram;
+				pstr = (char *)cpu->psx_ram;
 				pstr += (mipsinfo.i & 0x1fffff);
 
 				sprintf(temp, tfmt, pstr);
@@ -2136,19 +2116,19 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 	a3 = mipsinfo.i;
 
 	scan = (pc&0x0fffffff)/4;
-	while ((psx_ram[scan] != LE32(0x41e00000)) && (scan >= (0x10000/4)))
+	while ((cpu->psx_ram[scan] != LE32(0x41e00000)) && (scan >= (0x10000/4)))
 	{
 		scan--;
 	}
 
-	if (psx_ram[scan] != LE32(0x41e00000))
+	if (cpu->psx_ram[scan] != LE32(0x41e00000))
 	{
 		printf("FATAL ERROR: couldn't find IOP link signature\n");
 		return;
 	}
 
 	scan += 3;	// skip zero and version
-	memcpy(name, &psx_ram[scan], 8);
+	memcpy(name, &cpu->psx_ram[scan], 8);
 	name[8] = '\0';
 
 //	printf("IOP: call module [%s] service %d (PC=%08x)\n", name, callnum, pc);
@@ -2158,7 +2138,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 		switch (callnum)
 		{
 			case 4:	// printf
-				mname = (char *)psx_ram;
+				mname = (char *)cpu->psx_ram;
 				mname += a0 & 0x1fffff;
 				mname += (a0 & 3);
 
@@ -2238,7 +2218,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 				a0 /= 4;
 				#if DEBUG_THREADING
 				printf("   : flags %x routine %08x pri %x stacksize %d refCon %08x\n",
-					psx_ram[a0], psx_ram[a0+1], psx_ram[a0+2], psx_ram[a0+3], psx_ram[a0+4]);
+					cpu->psx_ram[a0], cpu->psx_ram[a0+1], cpu->psx_ram[a0+2], cpu->psx_ram[a0+3], cpu->psx_ram[a0+4]);
 				#endif
 
 				newAlloc = psf2_get_loadaddr();
@@ -2248,14 +2228,14 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					newAlloc &= ~0xf;
 					newAlloc += 16;
 				}
-				psf2_set_loadaddr(newAlloc + LE32(psx_ram[a0+3]));
+				psf2_set_loadaddr(newAlloc + LE32(cpu->psx_ram[a0+3]));
 				
 				threads[iNumThreads].iState = TS_CREATED;
 				threads[iNumThreads].stackloc = newAlloc;
-				threads[iNumThreads].flags = LE32(psx_ram[a0]);
-				threads[iNumThreads].routine = LE32(psx_ram[a0+2]);
-				threads[iNumThreads].stacksize = LE32(psx_ram[a0+3]);
-				threads[iNumThreads].refCon = LE32(psx_ram[a0+4]);
+				threads[iNumThreads].flags = LE32(cpu->psx_ram[a0]);
+				threads[iNumThreads].routine = LE32(cpu->psx_ram[a0+2]);
+				threads[iNumThreads].stacksize = LE32(cpu->psx_ram[a0+3]);
+				threads[iNumThreads].refCon = LE32(cpu->psx_ram[a0+4]);
 
 				mipsinfo.i = iNumThreads;
 				iNumThreads++;
@@ -2350,8 +2330,8 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 				a0 &= 0x1fffff;
 				a0 /= 4;
 
-				psx_ram[a0] = LE32(sys_time & 0xffffffff);  	// low
-				psx_ram[a0+1] = LE32(sys_time >> 32);	// high
+				cpu->psx_ram[a0] = LE32(sys_time & 0xffffffff);  	// low
+				cpu->psx_ram[a0+1] = LE32(sys_time >> 32);	// high
 
 				mipsinfo.i = 0;
 				mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R2, &mipsinfo);
@@ -2372,8 +2352,8 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					hi = dTicks>>32;
 					lo = dTicks & 0xffffffff;
 
-					psx_ram[((a1 & 0x1fffff)/4)] = LE32(lo);
-					psx_ram[((a1 & 0x1fffff)/4)+1] = LE32(hi);
+					cpu->psx_ram[((a1 & 0x1fffff)/4)] = LE32(lo);
+					cpu->psx_ram[((a1 & 0x1fffff)/4)+1] = LE32(hi);
 
 					mipsinfo.i = 0;
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R2, &mipsinfo);
@@ -2396,8 +2376,8 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					a1 /= 4;
 					a2 /= 4;
 
-					temp = LE32(psx_ram[a0]);
-					temp |= (uint64)LE32(psx_ram[a0+1])<<32;
+					temp = LE32(cpu->psx_ram[a0]);
+					temp |= (uint64)LE32(cpu->psx_ram[a0+1])<<32;
 
 					temp *= (uint64)1000000;
 					temp /= (uint64)36864000;
@@ -2406,8 +2386,8 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					seconds = (temp / 1000000) & 0xffffffff;
 					usec = (temp % 1000000) & 0xffffffff;
 
-					psx_ram[a1] = LE32(seconds);
-					psx_ram[a2] = LE32(usec);
+					cpu->psx_ram[a1] = LE32(seconds);
+					cpu->psx_ram[a2] = LE32(usec);
 				}
 				break;
 
@@ -2429,9 +2409,9 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 				a0 &= 0x1fffff;
 				a0 /= 4;
  
-				evflags[iNumFlags].type = LE32(psx_ram[a0]);
-				evflags[iNumFlags].value = LE32(psx_ram[a0+1]);
-				evflags[iNumFlags].param = LE32(psx_ram[a0+2]);
+				evflags[iNumFlags].type = LE32(cpu->psx_ram[a0]);
+				evflags[iNumFlags].value = LE32(cpu->psx_ram[a0+1]);
+				evflags[iNumFlags].param = LE32(cpu->psx_ram[a0+2]);
 				evflags[iNumFlags].inUse = 1;
 
 				#if DEBUG_HLE_IOP
@@ -2558,14 +2538,14 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 				a0 &= 0x7fffffff;
 				a0 /= 4;
 
-//				printf("Sema %d Parms: %08x %08x %08x %08x\n", mipsinfo.i, psx_ram[a0], psx_ram[a0+1], psx_ram[a0+2], psx_ram[a0+3]);
+//				printf("Sema %d Parms: %08x %08x %08x %08x\n", mipsinfo.i, cpu->psx_ram[a0], cpu->psx_ram[a0+1], cpu->psx_ram[a0+2], cpu->psx_ram[a0+3]);
 	
 				if (mipsinfo.i != -1)
 				{
-					semaphores[mipsinfo.i].attr = LE32(psx_ram[a0]);
-					semaphores[mipsinfo.i].option = LE32(psx_ram[a0+1]);
-					semaphores[mipsinfo.i].init = LE32(psx_ram[a0+2]);
-					semaphores[mipsinfo.i].max = LE32(psx_ram[a0+3]);
+					semaphores[mipsinfo.i].attr = LE32(cpu->psx_ram[a0]);
+					semaphores[mipsinfo.i].option = LE32(cpu->psx_ram[a0+1]);
+					semaphores[mipsinfo.i].init = LE32(cpu->psx_ram[a0+2]);
+					semaphores[mipsinfo.i].max = LE32(cpu->psx_ram[a0+3]);
 
 					semaphores[mipsinfo.i].current = semaphores[mipsinfo.i].init;
 
@@ -2774,8 +2754,8 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					printf("IOP: memcpy(%08x, %08x, %d)\n", a0, a1, a2);
 					#endif
 
-					dst = (uint8 *)&psx_ram[(a0&0x1fffff)/4];
-					src = (uint8 *)&psx_ram[(a1&0x1fffff)/4];
+					dst = (uint8 *)&cpu->psx_ram[(a0&0x1fffff)/4];
+					src = (uint8 *)&cpu->psx_ram[(a1&0x1fffff)/4];
 					// get exact byte alignment
 					dst += a0 % 4;
 					src += a1 % 4;
@@ -2802,8 +2782,8 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					printf("IOP: memmove(%08x, %08x, %d)\n", a0, a1, a2);
 					#endif
 
-					dst = (uint8 *)&psx_ram[(a0&0x1fffff)/4];
-					src = (uint8 *)&psx_ram[(a1&0x1fffff)/4];
+					dst = (uint8 *)&cpu->psx_ram[(a0&0x1fffff)/4];
+					src = (uint8 *)&cpu->psx_ram[(a1&0x1fffff)/4];
 					// get exact byte alignment
 					dst += a0 % 4;
 					src += a1 % 4;
@@ -2834,7 +2814,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					printf("IOP: memset(%08x, %02x, %d) [PC=%x]\n", a0, a1, a2, mipsinfo.i);
 					#endif
 
-					dst = (uint8 *)&psx_ram[(a0&0x1fffff)/4];
+					dst = (uint8 *)&cpu->psx_ram[(a0&0x1fffff)/4];
 					dst += (a0 & 3);
 
 					memset(dst, a1, a2);
@@ -2849,15 +2829,15 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					printf("IOP: bzero(%08x, %08x)\n", a0, a1);
 					#endif
 
-					dst = (uint8 *)&psx_ram[(a0&0x1fffff)/4];
+					dst = (uint8 *)&cpu->psx_ram[(a0&0x1fffff)/4];
 					dst += (a0 & 3);
 					memset(dst, 0, a1);
 				}
 				break;
 
 			case 19:	// sprintf
-				mname = (char *)psx_ram;
-				str1 = (char *)psx_ram;
+				mname = (char *)cpu->psx_ram;
+				str1 = (char *)cpu->psx_ram;
 				mname += a0 & 0x1fffff;
 				str1 += a1 & 0x1fffff;
 
@@ -2882,8 +2862,8 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					printf("IOP: strcpy(%08x, %08x)\n", a0, a1);
 					#endif
 
-					dst = (uint8 *)&psx_ram[(a0&0x1fffff)/4];
-					src = (uint8 *)&psx_ram[(a1&0x1fffff)/4];
+					dst = (uint8 *)&cpu->psx_ram[(a0&0x1fffff)/4];
+					src = (uint8 *)&cpu->psx_ram[(a1&0x1fffff)/4];
 					// get exact byte alignment
 					dst += a0 % 4;
 					src += a1 % 4;
@@ -2911,7 +2891,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					printf("IOP: strlen(%08x) [PC=%x]\n", a0, mipsinfo.i);
 					#endif
 
-					dst = (char *)&psx_ram[(a0&0x1fffff)/4];
+					dst = (char *)&cpu->psx_ram[(a0&0x1fffff)/4];
 					dst += (a0 & 3);
 					mipsinfo.i = strlen(dst);
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_R2, &mipsinfo);
@@ -2926,8 +2906,8 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					printf("IOP: strncpy(%08x, %08x, %d)\n", a0, a1, a2);
 					#endif
 
-					dst = (char *)&psx_ram[(a0&0x1fffff)/4];
-					src = (char *)&psx_ram[(a1&0x1fffff)/4];
+					dst = (char *)&cpu->psx_ram[(a0&0x1fffff)/4];
+					src = (char *)&cpu->psx_ram[(a1&0x1fffff)/4];
 					// get exact byte alignment
 					dst += a0 % 4;
 					src += a1 % 4;
@@ -2949,7 +2929,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 
 
 			case 36:	// strtol
-				mname = (char *)&psx_ram[(a0 & 0x1fffff)/4];
+				mname = (char *)&cpu->psx_ram[(a0 & 0x1fffff)/4];
 				mname += (a0 & 3);
 
 				if (a1)
@@ -3087,10 +3067,10 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 				printf("IOP: RegisterLibraryEntries(%08x) (PC=%x)\n", a0, mipsinfo.i);
 				#endif
 				
-				if (psx_ram[a0/4] == LE32(0x41c00000))
+				if (cpu->psx_ram[a0/4] == LE32(0x41c00000))
 				{
 					a0 += 3*4;
-					memcpy(&reglibs[iNumLibs].name, &psx_ram[a0/4], 8);
+					memcpy(&reglibs[iNumLibs].name, &cpu->psx_ram[a0/4], 8);
 					reglibs[iNumLibs].name[8] = '\0';
 					#if DEBUG_HLE_IOP
 					printf("Lib name [%s]\n", &reglibs[iNumLibs].name);
@@ -3176,7 +3156,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 				break;
 
 			case 14: // Kprintf
-				mname = (char *)psx_ram;
+				mname = (char *)cpu->psx_ram;
 				mname += a0 & 0x1fffff;
 				mname += (a0 & 3);
 
@@ -3209,7 +3189,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 				{
 					FILE *f;
 					f = fopen("psxram.bin", "wb");
-					fwrite(psx_ram, 2*1024*1024, 1, f);
+					fwrite(cpu->psx_ram, 2*1024*1024, 1, f);
 					fclose(f);
 				}
 				#endif
@@ -3228,9 +3208,9 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 		switch (callnum)
 		{
 			case 7:	// LoadStartModule
-				mname = (char *)&psx_ram[(a0 & 0x1fffff)/4];
+				mname = (char *)&cpu->psx_ram[(a0 & 0x1fffff)/4];
 				mname += 8;
-				str1 = (char *)&psx_ram[(a2 & 0x1fffff)/4];
+				str1 = (char *)&cpu->psx_ram[(a2 & 0x1fffff)/4];
 				#if DEBUG_HLE_IOP
 				printf("LoadStartModule: %s\n", mname);
 				#endif
@@ -3256,7 +3236,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					if (start != 0xffffffff)
 					{
 						uint32 args[20], numargs = 1, argofs;
-						uint8 *argwalk = (uint8 *)psx_ram, *argbase;
+						uint8 *argwalk = (uint8 *)cpu->psx_ram, *argbase;
 						
 						argwalk += (a2 & 0x1fffff);
 						argbase = argwalk;
@@ -3288,7 +3268,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 							#if DEBUG_HLE_IOP
 //							printf("Arg %d: %08x [%s]\n", i, args[i], &argbase[args[i]-a2]); 
 							#endif
-							psx_ram[(newAlloc/4)+i] = LE32(args[i]);
+							cpu->psx_ram[(newAlloc/4)+i] = LE32(args[i]);
 						}
 
 						// set argv and argc
@@ -3338,7 +3318,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 						return;
 					}
 
-					mname = (char *)psx_ram;
+					mname = (char *)cpu->psx_ram;
 					mname += (a0 & 0x1fffff);
 
 					if (!strncmp(mname, "aofile:", 7))
@@ -3406,7 +3386,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 						a2 = filesize[a0] - filepos[a0];
 					}
 
-					rp = (uint8 *)psx_ram;
+					rp = (uint8 *)cpu->psx_ram;
 					rp += (a1 & 0x1fffff);
 					memcpy(rp, &filedata[a0][filepos[a0]], a2);
 
@@ -3489,7 +3469,7 @@ void psx_iop_call(mips_cpu_context *cpu, uint32 pc, uint32 callnum)
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_DELAYV, &mipsinfo);
 					mips_set_info(cpu,CPUINFO_INT_REGISTER + MIPS_DELAYR, &mipsinfo);
 
-					mipsinfo.i = LE32(psx_ram[(reglibs[lib].dispatch/4) + callnum]);
+					mipsinfo.i = LE32(cpu->psx_ram[(reglibs[lib].dispatch/4) + callnum]);
 
 					// (NOTE: we get called in the delay slot!)
 					#if DEBUG_HLE_IOP