Support for in64 -> float conversions w/ correct rounding.

git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2235 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e

10 files changed, 414 insertions, 7 deletions

diff --git a/runtime/Makefile b/runtime/Makefile
index a2af8d5..cd4e301 100644
--- a/runtime/Makefile
+++ b/runtime/Makefile
@@ -3,8 +3,8 @@ include ../Makefile.config
 CFLAGS=-O1 -g -Wall
 INCLUDES=
 OBJS=i64_dtos.o i64_dtou.o i64_sar.o i64_sdiv.o i64_shl.o \
-  i64_shr.o i64_smod.o i64_stod.o i64_udivmod.o i64_udiv.o \
-  i64_umod.o i64_utod.o
+  i64_shr.o i64_smod.o i64_stod.o i64_stof.o \
+  i64_udivmod.o i64_udiv.o i64_umod.o i64_utod.o i64_utof.o
 LIB=libcompcert.a
 
 all: $(LIB) $(INCLUDES)
diff --git a/runtime/arm/i64_stof.S b/runtime/arm/i64_stof.S
new file mode 100644
index 0000000..165063a
--- /dev/null
+++ b/runtime/arm/i64_stof.S
@@ -0,0 +1,77 @@
+@ *****************************************************************
+@
+@               The Compcert verified compiler
+@
+@           Xavier Leroy, INRIA Paris-Rocquencourt
+@
+@ Copyright (c) 2013 Institut National de Recherche en Informatique et
+@  en Automatique.
+@
+@ Redistribution and use in source and binary forms, with or without
+@ modification, are permitted provided that the following conditions are met:
+@     * Redistributions of source code must retain the above copyright
+@       notice, this list of conditions and the following disclaimer.
+@     * Redistributions in binary form must reproduce the above copyright
+@       notice, this list of conditions and the following disclaimer in the
+@       documentation and/or other materials provided with the distribution.
+@     * Neither the name of the <organization> nor the
+@       names of its contributors may be used to endorse or promote products
+@       derived from this software without specific prior written permission.
+@ 
+@ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+@ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+@ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+@ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT
+@ HOLDER> BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+@ EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+@ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+@ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+@ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+@ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+@
+@ *********************************************************************
+
+@ Helper functions for 64-bit integer arithmetic.  ARM version.
+
+        .text
+
+@@@ Conversion from signed 64-bit integer to single float
+	
+	.global __i64_stof
+__i64_stof:
+    # Check whether -2^53 <= X < 2^53
+        mov r2, r1, asr #21
+        mov r3, r1, asr #31     @ (r2,r3) = X >> 53
+        adds r2, r2, #1
+        adc r3, r3, #0          @ (r2,r3) = X >> 53 + 1
+        cmp r3, #2
+        blo 1b
+   # X is large enough that double rounding can occur.
+   # Avoid it by nudging X away from the points where double rounding
+   # occurs (the "round to odd" technique)
+	mov r2, #0x700
+        orr r2, r2, #0xFF       # r2 = 0x7FF
+        and r3, r0, r2          # extract bits 0 to 11 of X
+        add r3, r3, r2          # r3 = (X & 0x7FF) + 0x7FF
+   # bit 12 of r3 is 0 if all low 12 bits of X are 0, 1 otherwise
+   # bits 13-31 of r3 are 0
+        orr r0, r0, r3          # correct bit number 12 of X
+	bic r0, r0, r2          # set to 0 bits 0 to 11 of X
+   # Convert to double
+1:      fmsr s0, r0
+        fuitod d0, s0           @ convert low half to double (unsigned)
+        fmsr s2, r1
+        fsitod d1, s2           @ convert high half to double (signed)
+        fldd d2, .LC1           @ d2 = 2^32
+        fmacd d0, d1, d2        @ d0 = d0 + d1 * d2 = double value of int64
+   # Round to single
+        fcvtsd s0, d0
+   # Return result in r0
+	fmrs r0, s0
+        bx lr
+	.type __i64_stof, %function
+	.size __i64_stof, . - __i64_stof
+
+        .balign 8
+.LC1:   .quad 0x41f0000000000000 @ 2^32 in double precision
diff --git a/runtime/arm/i64_utof.S b/runtime/arm/i64_utof.S
new file mode 100644
index 0000000..ff21438
--- /dev/null
+++ b/runtime/arm/i64_utof.S
@@ -0,0 +1,73 @@
+@ *****************************************************************
+@
+@               The Compcert verified compiler
+@
+@           Xavier Leroy, INRIA Paris-Rocquencourt
+@
+@ Copyright (c) 2013 Institut National de Recherche en Informatique et
+@  en Automatique.
+@
+@ Redistribution and use in source and binary forms, with or without
+@ modification, are permitted provided that the following conditions are met:
+@     * Redistributions of source code must retain the above copyright
+@       notice, this list of conditions and the following disclaimer.
+@     * Redistributions in binary form must reproduce the above copyright
+@       notice, this list of conditions and the following disclaimer in the
+@       documentation and/or other materials provided with the distribution.
+@     * Neither the name of the <organization> nor the
+@       names of its contributors may be used to endorse or promote products
+@       derived from this software without specific prior written permission.
+@ 
+@ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+@ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+@ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+@ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT
+@ HOLDER> BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+@ EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+@ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+@ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+@ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+@ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+@
+@ *********************************************************************
+
+@ Helper functions for 64-bit integer arithmetic.  ARM version.
+
+        .text
+
+@@@ Conversion from unsigned 64-bit integer to single float
+	
+	.global __i64_utof
+__i64_utof:
+    # Check whether X < 2^53
+        movs r2, r1, lsr #21    # test if X >> 53 == 0
+        beq 1b
+   # X is large enough that double rounding can occur.
+   # Avoid it by nudging X away from the points where double rounding
+   # occurs (the "round to odd" technique)
+	mov r2, #0x700
+        orr r2, r2, #0xFF       # r2 = 0x7FF
+        and r3, r0, r2          # extract bits 0 to 11 of X
+        add r3, r3, r2          # r3 = (X & 0x7FF) + 0x7FF
+   # bit 12 of r3 is 0 if all low 12 bits of X are 0, 1 otherwise
+   # bits 13-31 of r3 are 0
+        orr r0, r0, r3          # correct bit number 12 of X
+	bic r0, r0, r2          # set to 0 bits 0 to 11 of X
+   # Convert to double
+1:      fmsr s0, r0
+        fuitod d0, s0           @ convert low half to double (unsigned)
+        fmsr s2, r1
+        fuitod d1, s2           @ convert high half to double (unsigned)
+        fldd d2, .LC1           @ d2 = 2^32
+        fmacd d0, d1, d2        @ d0 = d0 + d1 * d2 = double value of int64
+   # Round to single
+        fcvtsd s0, d0
+   # Return result in r0
+	fmrs r0, s0
+        bx lr
+	.type __i64_utof, %function
+	.size __i64_utof, . - __i64_utof
+
+        .balign 8
+.LC1:   .quad 0x41f0000000000000 @ 2^32 in double precision
diff --git a/runtime/ia32/i64_stod.S b/runtime/ia32/i64_stod.S
index 50ac06d..d020e2f 100644
--- a/runtime/ia32/i64_stod.S
+++ b/runtime/ia32/i64_stod.S
@@ -36,10 +36,14 @@
 	
 #include "sysdeps.h"
 
-// Conversion signed long -> float
+// Conversion signed long -> double-precision float
 
 FUNCTION(__i64_stod)
         fildll 4(%esp)
         ret
+    // The result is in extended precision (80 bits) and therefore
+    // exact (64 bits of mantissa).  It will be rounded to double
+    // precision by the caller, when transferring the result
+    // to an XMM register or a 64-bit stack slot.
 ENDFUNCTION(__i64_stod)
 
diff --git a/runtime/ia32/i64_stof.S b/runtime/ia32/i64_stof.S
new file mode 100644
index 0000000..25b1d4f
--- /dev/null
+++ b/runtime/ia32/i64_stof.S
@@ -0,0 +1,49 @@
+// *****************************************************************
+//
+//               The Compcert verified compiler
+//
+//           Xavier Leroy, INRIA Paris-Rocquencourt
+//
+// Copyright (c) 2013 Institut National de Recherche en Informatique et
+//  en Automatique.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//     * Redistributions of source code must retain the above copyright
+//       notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above copyright
+//       notice, this list of conditions and the following disclaimer in the
+//       documentation and/or other materials provided with the distribution.
+//     * Neither the name of the <organization> nor the
+//       names of its contributors may be used to endorse or promote products
+//       derived from this software without specific prior written permission.
+// 
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT
+// HOLDER> BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// *********************************************************************
+
+// Helper functions for 64-bit integer arithmetic.  IA32 version.
+	
+#include "sysdeps.h"
+
+// Conversion signed long -> single-precision float
+
+FUNCTION(__i64_stof)
+        fildll 4(%esp)
+  // The TOS is in extended precision and therefore exact.
+  // Force rounding to single precision
+        fstps  4(%esp)
+        flds   4(%esp)
+        ret
+ENDFUNCTION(__i64_stof)
+
diff --git a/runtime/ia32/i64_utod.S b/runtime/ia32/i64_utod.S
index 7754ef2..428a3b9 100644
--- a/runtime/ia32/i64_utod.S
+++ b/runtime/ia32/i64_utod.S
@@ -36,7 +36,7 @@
 	
 #include "sysdeps.h"
 
-// Conversion unsigned long -> float
+// Conversion unsigned long -> double-precision float
 
 FUNCTION(__i64_utod)
         fildll 4(%esp)                  // convert as if signed
@@ -44,6 +44,10 @@ FUNCTION(__i64_utod)
         jns 1f
         fadds LC1                       // adjust by 2^64
 1:      ret
+    // The result is in extended precision (80 bits) and therefore
+    // exact (64 bits of mantissa).  It will be rounded to double
+    // precision by the caller, when transferring the result
+    // to an XMM register or a 64-bit stack slot.
 
         .p2align 2
 LC1:    .long 0x5f800000                // 2^64 in single precision
diff --git a/runtime/ia32/i64_utof.S b/runtime/ia32/i64_utof.S
new file mode 100644
index 0000000..0b58f48
--- /dev/null
+++ b/runtime/ia32/i64_utof.S
@@ -0,0 +1,55 @@
+// *****************************************************************
+//
+//               The Compcert verified compiler
+//
+//           Xavier Leroy, INRIA Paris-Rocquencourt
+//
+// Copyright (c) 2013 Institut National de Recherche en Informatique et
+//  en Automatique.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//     * Redistributions of source code must retain the above copyright
+//       notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above copyright
+//       notice, this list of conditions and the following disclaimer in the
+//       documentation and/or other materials provided with the distribution.
+//     * Neither the name of the <organization> nor the
+//       names of its contributors may be used to endorse or promote products
+//       derived from this software without specific prior written permission.
+// 
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT
+// HOLDER> BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// *********************************************************************
+
+// Helper functions for 64-bit integer arithmetic.  IA32 version.
+	
+#include "sysdeps.h"
+
+// Conversion unsigned long -> single-precision float
+
+FUNCTION(__i64_utof)
+        fildll 4(%esp)                  // convert as if signed
+        cmpl $0, 8(%esp)                // is argument >= 2^63?
+        jns 1f
+        fadds LC1                       // adjust by 2^64
+  // The TOS is in extended precision and therefore exact.
+  // Force rounding to single precision
+1:      fstps  4(%esp)
+        flds   4(%esp)
+        ret
+
+        .p2align 2
+LC1:    .long 0x5f800000                // 2^64 in single precision
+
+ENDFUNCTION(__i64_utof)       
diff --git a/runtime/powerpc/i64_stof.s b/runtime/powerpc/i64_stof.s
new file mode 100644
index 0000000..05b36a7
--- /dev/null
+++ b/runtime/powerpc/i64_stof.s
@@ -0,0 +1,68 @@
+# *****************************************************************
+#
+#               The Compcert verified compiler
+#
+#           Xavier Leroy, INRIA Paris-Rocquencourt
+#
+# Copyright (c) 2013 Institut National de Recherche en Informatique et
+#  en Automatique.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of the <organization> nor the
+#       names of its contributors may be used to endorse or promote products
+#       derived from this software without specific prior written permission.
+# 
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT
+# HOLDER> BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# *********************************************************************
+
+# Helper functions for 64-bit integer arithmetic.  PowerPC version.
+
+        .text
+
+### Conversion from signed long to single float	
+
+        .balign 16
+        .globl __i64_stof
+__i64_stof:
+	mflr r9
+   # Check whether -2^53 <= X < 2^53	
+        srawi r5, r3, 31
+        srawi r6, r3, 21        # (r5,r6) = X >> 53
+        addic r6, r6, 1
+        addze r5, r5            # (r5,r6) = (X >> 53) + 1
+        cmplwi r5, 2
+        blt 1f
+   # X is large enough that double rounding can occur.
+   # Avoid it by nudging X away from the points where double rounding
+   # occurs (the "round to odd" technique)
+        rlwinm r0, r4, 0, 21, 31 # extract bits 0 to 11 of X
+        addi r0, r0, 0x7FF      # r0 = (X & 0x7FF) + 0x7FF
+   # bit 12 of r0 is 0 if all low 12 bits of X are 0, 1 otherwise
+   # bits 13-31 of r0 are 0
+        or r4, r4, r0           # correct bit number 12 of X
+        rlwinm r4, r4, 0, 0, 20 # set to 0 bits 0 to 11 of X
+   # Convert to double, then round to single	
+1:      bl __i64_stod
+        mtlr r9
+        frsp f1, f1
+        blr
+        .type __i64_stof, @function
+        .size __i64_stof, .-__i64_stof
+	
diff --git a/runtime/powerpc/i64_utof.s b/runtime/powerpc/i64_utof.s
new file mode 100644
index 0000000..b31e520
--- /dev/null
+++ b/runtime/powerpc/i64_utof.s
@@ -0,0 +1,64 @@
+# *****************************************************************
+#
+#               The Compcert verified compiler
+#
+#           Xavier Leroy, INRIA Paris-Rocquencourt
+#
+# Copyright (c) 2013 Institut National de Recherche en Informatique et
+#  en Automatique.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of the <organization> nor the
+#       names of its contributors may be used to endorse or promote products
+#       derived from this software without specific prior written permission.
+# 
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT
+# HOLDER> BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# *********************************************************************
+
+# Helper functions for 64-bit integer arithmetic.  PowerPC version.
+
+        .text
+
+### Conversion from unsigned long to single float	
+
+        .balign 16
+        .globl __i64_utof
+__i64_utof:
+	mflr r9
+   # Check whether X < 2^53	
+        srlwi. r0, r3, 21       # test if X >> 53 == 0
+        beq 1f
+   # X is large enough that double rounding can occur.
+   # Avoid it by nudging X away from the points where double rounding
+   # occurs (the "round to odd" technique)
+        rlwinm r0, r4, 0, 21, 31 # extract bits 0 to 11 of X
+        addi r0, r0, 0x7FF      # r0 = (X & 0x7FF) + 0x7FF
+   # bit 12 of r0 is 0 if all low 12 bits of X are 0, 1 otherwise
+   # bits 13-31 of r0 are 0
+        or r4, r4, r0           # correct bit number 12 of X
+        rlwinm r4, r4, 0, 0, 20 # set to 0 bits 0 to 11 of X
+   # Convert to double, then round to single	
+1:      bl __i64_utod
+        mtlr r9
+        frsp f1, f1
+        blr
+        .type __i64_utof, @function
+        .size __i64_utof, .-__i64_utof
+	
diff --git a/runtime/test/test_int64.c b/runtime/test/test_int64.c
index 4dbad70..2aa2111 100644
--- a/runtime/test/test_int64.c
+++ b/runtime/test/test_int64.c
@@ -52,6 +52,8 @@ extern s64 __i64_sar(s64 x, unsigned amount);
 
 extern double __i64_utod(u64 x);
 extern double __i64_stod(s64 x);
+extern float __i64_utof(u64 x);
+extern float __i64_stof(s64 x);
 extern u64 __i64_dtou(double d);
 extern s64 __i64_dtos(double d);
 
@@ -70,6 +72,7 @@ static void test1(u64 x, u64 y)
   s64 t, sy;
   int i;
   double f, g;
+  float u, v;
 
   if (y != 0) {
 
@@ -147,14 +150,24 @@ static void test1(u64 x, u64 y)
   if (f != g)
     error++, printf("(double) %lld (s) = %a, expected %a\n", x, f, g);
 
+  u = __i64_utof(x);
+  v = (float) x;
+  if (u != v)
+    error++, printf("(float) %llu (u) = %a, expected %a\n", x, u, v);
+
+  u = __i64_stof(x);
+  v = (float) (s64) x;
+  if (u != v)
+    error++, printf("(double) %lld (s) = %a, expected %a\n", x, u, v);
+
   f = (double) x;
   z = __i64_dtou(f);
-  if (z != (u64) (double) f)
+  if (z != (u64) f)
     error++, printf("(u64) %a = %llu, expected %llu\n", f, z, (u64) f);
 
-  f = (double) ((s64) x);
+  f = (double) (s64) x;
   t = __i64_dtos(f);
-  if (t != (s64) (double) f)
+  if (t != (s64) f)
     error++, printf("(s64) %a = %lld, expected %lld\n", f, z, (s64) f);
 
   f = ((double) x) * 0.0001;