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authorGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2014-07-27 07:35:49 +0000
committerGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2014-07-27 07:35:49 +0000
commitf4e106d4fc1cce484678b5cdd86ab57d7a43076a (patch)
tree3de9bddc63b80fb1b695bbdb8fa5bd6aa893a13a /runtime/arm/i64_stod.S
parent04ff02a9f4bc4f766a450e5463729102ee26882e (diff)
ARM port: add support for Thumb2. To be tested.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2549 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'runtime/arm/i64_stod.S')
-rw-r--r--runtime/arm/i64_stod.S21
1 files changed, 10 insertions, 11 deletions
diff --git a/runtime/arm/i64_stod.S b/runtime/arm/i64_stod.S
index 7e5a06f..81e43e2 100644
--- a/runtime/arm/i64_stod.S
+++ b/runtime/arm/i64_stod.S
@@ -34,24 +34,23 @@
@ Helper functions for 64-bit integer arithmetic. ARM version.
- .text
+#include "sysdeps.h"
@@@ Conversion from signed 64-bit integer to double float
- .global __i64_stod
+FUNCTION(__i64_stod)
__i64_stod:
- fmsr s0, r0
- fuitod d0, s0 @ convert low half to double (unsigned)
- fmsr s2, r1
- fsitod d1, s2 @ convert high half to double (signed)
- fldd d2, .LC1 @ d2 = 2^32
- fmacd d0, d1, d2 @ d0 = d0 + d1 * d2 = double value of int64
+ vmov s0, r0
+ vcvt.f64.u32 d0, s0 @ convert low half to double (unsigned)
+ vmov s2, r1
+ vcvt.f64.s32 d1, s2 @ convert high half to double (signed)
+ vldr d2, .LC1 @ d2 = 2^32
+ vmla.f64 d0, d1, d2 @ d0 = d0 + d1 * d2 = double value of int64
#ifdef VARIANT_eabi
- fmrrd r0, r1, d0 @ return result in r0, r1
+ vmov r0, r1, d0 @ return result in r0, r1
#endif
bx lr
- .type __i64_stod, %function
- .size __i64_stod, . - __i64_stod
+ENDFUNCTION(__i64_stod)
.balign 8
.LC1: .quad 0x41f0000000000000 @ 2^32 in double precision