ia32/i64_dtou: wrong play on rounding mode

arm, powerpc: expand shifts inline in dtos and dtou
arm: branchless code for shl and shr
test: more tests for double -> long long conversions.


git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2234 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e

1 files changed, 16 insertions, 3 deletions

diff --git a/runtime/arm/i64_dtou.S b/runtime/arm/i64_dtou.S
index 7f6152e..50648a5 100644
--- a/runtime/arm/i64_dtou.S
+++ b/runtime/arm/i64_dtou.S
@@ -60,9 +60,22 @@ __i64_dtou:
         orr r1, r1, #0x00100000 @ HI |= 0x00100000
   @ shift it appropriately
         cmp r2, #0
-        bge __i64_shl           @ if EXP >= 0, shift left by EXP
-        rsb r2, r2, #0
-        b __i64_shr             @ otherwise, shift right by -EXP
+        blt 3f
+  @ EXP >= 0: shift left by EXP.  Note that EXP < 12        
+        rsb r3, r2, #32         @ r3 = 32 - amount
+        mov r1, r1, lsl r2
+        orr r1, r1, r0, lsr r3
+        mov r0, r0, lsl r2
+	bx lr
+  @ EXP < 0: shift right by -EXP.  Note that -EXP <= 52 but can be >= 32        
+3:      rsb r2, r2, #0          @ r2 = -EXP - shift amount
+        rsb r3, r2, #32         @ r3 = 32 - amount
+        mov r0, r0, lsr r2
+        orr r0, r0, r1, lsl r3
+	sub r3, r2, #32         @ r3 = amount - 32  (see i64_shr.s)
+	orr r0, r0, r1, lsr r3
+        mov r1, r1, lsr r2
+        bx lr
   @ special cases
 1:      mov r0, #0              @ result is 0
         mov r1, #0