diff options
author | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2013-02-12 15:17:33 +0000 |
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committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2013-02-12 15:17:33 +0000 |
commit | f1ceca440c0322001abe6c5de79bd4bc309fc002 (patch) | |
tree | e7abf7f268f216d22f8b3a1e8914bd3561b4cfe0 /powerpc/Op.v | |
parent | de89f0892f6abc59e017727dc8072b7b70cd8e71 (diff) |
Updated PowerPC port to new integers.
Added options -falign-branch-targets and -falign-cond-branches (experimental).
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2113 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'powerpc/Op.v')
-rw-r--r-- | powerpc/Op.v | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/powerpc/Op.v b/powerpc/Op.v index 58bcb2c..4a1fb62 100644 --- a/powerpc/Op.v +++ b/powerpc/Op.v @@ -1044,8 +1044,7 @@ Fixpoint is_rlw_mask_rec (n: nat) (s: rlw_state) (x: Z) {struct n} : bool := | O => rlw_accepting s | S m => - let (b, y) := Int.Z_bin_decomp x in - is_rlw_mask_rec m (rlw_transition s b) y + is_rlw_mask_rec m (rlw_transition s (Z.odd x)) (Z.div2 x) end. Definition is_rlw_mask (x: int) : bool := |