diff options
| author |  xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2013-04-20 07:54:52 +0000 |
|---|---|---|
| committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2013-04-20 07:54:52 +0000 |
| commit | 255cee09b71255051c2b40eae0c88bffce1f6f32 (patch) | |
| tree | 7951b1b13e8fd5e525b9223e8be0580e83550f55 /powerpc/Machregsaux.ml | |
| parent | 6e5041958df01c56762e90770abd704b95a36e5d (diff) | |
Big merge of the newregalloc-int64 branch. Lots of changes in two directions:
1- new register allocator (+ live range splitting, spilling&reloading, etc)
based on a posteriori validation using the Rideau-Leroy algorithm
2- support for 64-bit integer arithmetic (type "long long").
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2200 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'powerpc/Machregsaux.ml')
| -rw-r--r-- | powerpc/Machregsaux.ml | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/powerpc/Machregsaux.ml b/powerpc/Machregsaux.ml index 713e14d..b8d7c97 100644 --- a/powerpc/Machregsaux.ml +++ b/powerpc/Machregsaux.ml @@ -17,21 +17,20 @@ open Machregs let register_names = [ ("R3", R3); ("R4", R4); ("R5", R5); ("R6", R6); ("R7", R7); ("R8", R8); ("R9", R9); ("R10", R10); + ("R11", R11); ("R12", R12); ("R14", R14); ("R15", R15); ("R16", R16); ("R17", R17); ("R18", R18); ("R19", R19); ("R20", R20); ("R21", R21); ("R22", R22); ("R23", R23); ("R24", R24); ("R25", R25); ("R26", R26); ("R27", R27); ("R28", R28); ("R29", R29); ("R30", R30); ("R31", R31); - ("F1", F1); ("F2", F2); ("F3", F3); ("F4", F4); + ("F0", F0); ("F1", F1); ("F2", F2); ("F3", F3); ("F4", F4); ("F5", F5); ("F6", F6); ("F7", F7); ("F8", F8); - ("F9", F9); ("F10", F10); ("F11", F11); - ("F14", F14); ("F15", F15); + ("F9", F9); ("F10", F10); ("F11", F11); ("F12", F12); + ("F13", F13); ("F14", F14); ("F15", F15); ("F16", F16); ("F17", F17); ("F18", F18); ("F19", F19); ("F20", F20); ("F21", F21); ("F22", F22); ("F23", F23); ("F24", F24); ("F25", F25); ("F26", F26); ("F27", F27); - ("F28", F28); ("F29", F29); ("F30", F30); ("F31", F31); - ("R11", IT1); ("R12", IT2); - ("F0", FT1); ("F12", FT2); ("F13", FT3) + ("F28", F28); ("F29", F29); ("F30", F30); ("F31", F31) ] let name_of_register r = |