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authorGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2010-08-21 10:21:11 +0000
committerGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2010-08-21 10:21:11 +0000
commite99d18c442c40a14e6eaea722cbc7ef0ca6dd26a (patch)
treef0bba75f5ded45e06fdc50aad94dcd246b66d174 /powerpc/Asmgenproof.v
parent0438984dece5f028bea55322d80aa4f363a782cb (diff)
Integers: cleaned up bitwise operations, redefined shr, zero_ext and sign_ext
as bitwise operations rather than arithmetic ones. CastOptimproof: fixed for ARM port. Other files: adapted to changes in Integers. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1472 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'powerpc/Asmgenproof.v')
-rw-r--r--powerpc/Asmgenproof.v6
1 files changed, 3 insertions, 3 deletions
diff --git a/powerpc/Asmgenproof.v b/powerpc/Asmgenproof.v
index ee2867e..fc14830 100644
--- a/powerpc/Asmgenproof.v
+++ b/powerpc/Asmgenproof.v
@@ -1217,10 +1217,10 @@ Proof.
rewrite <- Int.shl_rolm. rewrite Int.shl_mul.
rewrite Int.mul_signed.
apply Int.signed_repr.
- split. apply Zle_trans with 0. vm_compute; congruence. omega.
+ split. apply Zle_trans with 0. compute; congruence. omega.
omega.
- vm_compute. reflexivity.
- vm_compute. apply Int.mkint_eq. auto.
+ compute. reflexivity.
+ apply Int.mkint_eq. compute. reflexivity.
inv AT. simpl in H7.
set (k1 := Pbtbl GPR12 tbl :: transl_code f c).
set (rs1 := nextinstr (rs0 # GPR12 <- (Vint (Int.rolm n (Int.repr 2) (Int.repr (-4)))))).