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authorGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2014-01-12 10:48:56 +0000
committerGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2014-01-12 10:48:56 +0000
commit7998ccfd709b97f1a2306df4570365d58a5bb4b5 (patch)
treebf76efed90d88ede9e44187072b9cbd5265aab66 /powerpc/Asmgen.v
parent362f2f36a44fa6ab4fe28264ed572d721adece70 (diff)
- Back to origins: suppress Mfloat64al32 chunk and align Mfloat64 to 4.
- Revised printing of intermediate RTL code. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2403 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'powerpc/Asmgen.v')
-rw-r--r--powerpc/Asmgen.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/powerpc/Asmgen.v b/powerpc/Asmgen.v
index 39c0d1b..6b66686 100644
--- a/powerpc/Asmgen.v
+++ b/powerpc/Asmgen.v
@@ -563,7 +563,7 @@ Definition transl_load (chunk: memory_chunk) (addr: addressing)
| Mfloat32 =>
do r <- freg_of dst;
transl_memory_access (Plfs r) (Plfsx r) addr args GPR12 k
- | Mfloat64 | Mfloat64al32 =>
+ | Mfloat64 =>
do r <- freg_of dst;
transl_memory_access (Plfd r) (Plfdx r) addr args GPR12 k
| Mint64 =>
@@ -586,7 +586,7 @@ Definition transl_store (chunk: memory_chunk) (addr: addressing)
| Mfloat32 =>
do r <- freg_of src;
transl_memory_access (Pstfs r) (Pstfsx r) addr args temp k
- | Mfloat64 | Mfloat64al32 =>
+ | Mfloat64 =>
do r <- freg_of src;
transl_memory_access (Pstfd r) (Pstfdx r) addr args temp k
| Mint64 =>