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authorGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2012-07-23 15:01:54 +0000
committerGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2012-07-23 15:01:54 +0000
commit4297fcb821c3188449b64184af73e41491a6118f (patch)
tree3f31e0bd4bcfa107a345c1670e65290e785ee091 /ia32
parent7c9500e438384c6c0ce478c8c73b3887137ac924 (diff)
- Revised non-overflow constraints on memory injections so that
injections compose (Values, Memdata, Memory) - Memory chunks: Mfloat64 now has alignment 8; introduced Mfloat64al32 that works like old Mfloat64 (i.e. has alignment 4); simplified handling of memcpy builtin accordingly. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1983 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'ia32')
-rw-r--r--ia32/Asm.v10
-rw-r--r--ia32/Asmgen.v4
-rw-r--r--ia32/Asmgenproof1.v10
-rw-r--r--ia32/PrintAsm.ml4
-rw-r--r--ia32/standard/Stacklayout.v5
5 files changed, 20 insertions, 13 deletions
diff --git a/ia32/Asm.v b/ia32/Asm.v
index 6210286..a78c8bf 100644
--- a/ia32/Asm.v
+++ b/ia32/Asm.v
@@ -474,17 +474,17 @@ Definition exec_instr (c: code) (i: instruction) (rs: regset) (m: mem) : outcome
| Pmovsd_fi rd n =>
Next (nextinstr (rs#rd <- (Vfloat n))) m
| Pmovsd_fm rd a =>
- exec_load Mfloat64 m a rs rd
+ exec_load Mfloat64al32 m a rs rd
| Pmovsd_mf a r1 =>
- exec_store Mfloat64 m a rs r1
+ exec_store Mfloat64al32 m a rs r1
| Pfld_f r1 =>
Next (nextinstr (rs#ST0 <- (rs r1))) m
| Pfld_m a =>
- exec_load Mfloat64 m a rs ST0
+ exec_load Mfloat64al32 m a rs ST0
| Pfstp_f rd =>
Next (nextinstr (rs#rd <- (rs ST0) #ST0 <- Vundef)) m
| Pfstp_m a =>
- exec_store Mfloat64 m a rs ST0
+ exec_store Mfloat64al32 m a rs ST0
| Pxchg_rr r1 r2 =>
Next (nextinstr (rs#r1 <- (rs r2) #r2 <- (rs r1))) m
(** Moves with conversion *)
@@ -709,7 +709,7 @@ Inductive extcall_arg (rs: regset) (m: mem): loc -> val -> Prop :=
extcall_arg rs m (S (Outgoing ofs Tint)) v
| extcall_arg_float_stack: forall ofs bofs v,
bofs = Stacklayout.fe_ofs_arg + 4 * ofs ->
- Mem.loadv Mfloat64 m (Val.add (rs (IR ESP)) (Vint (Int.repr bofs))) = Some v ->
+ Mem.loadv Mfloat64al32 m (Val.add (rs (IR ESP)) (Vint (Int.repr bofs))) = Some v ->
extcall_arg rs m (S (Outgoing ofs Tfloat)) v.
Definition extcall_arguments
diff --git a/ia32/Asmgen.v b/ia32/Asmgen.v
index 3fc3efb..5a6c1ab 100644
--- a/ia32/Asmgen.v
+++ b/ia32/Asmgen.v
@@ -452,7 +452,7 @@ Definition transl_load (chunk: memory_chunk)
do r <- ireg_of dest; OK(Pmov_rm r am :: k)
| Mfloat32 =>
do r <- freg_of dest; OK(Pcvtss2sd_fm r am :: k)
- | Mfloat64 =>
+ | Mfloat64 | Mfloat64al32 =>
do r <- freg_of dest; OK(Pmovsd_fm r am :: k)
end.
@@ -469,7 +469,7 @@ Definition transl_store (chunk: memory_chunk)
do r <- ireg_of src; OK(Pmov_mr am r :: k)
| Mfloat32 =>
do r <- freg_of src; OK(Pcvtsd2ss_mf am r :: k)
- | Mfloat64 =>
+ | Mfloat64 | Mfloat64al32 =>
do r <- freg_of src; OK(Pmovsd_mf am r :: k)
end.
diff --git a/ia32/Asmgenproof1.v b/ia32/Asmgenproof1.v
index 7b3427b..7ad8a02 100644
--- a/ia32/Asmgenproof1.v
+++ b/ia32/Asmgenproof1.v
@@ -1679,7 +1679,11 @@ Proof.
transitivity (Val.add ((rs#(preg_of dest) <- v) PC) Vone).
auto. decEq. apply Pregmap.gso; auto with ppcgen.
exists rs2. split.
- destruct chunk; ArgsInv; apply exec_straight_one; simpl; auto.
+ destruct chunk; ArgsInv; apply exec_straight_one; auto.
+ (* Mfloat64 -> Mfloat64al32 *)
+ rewrite <- H. simpl. unfold exec_load. rewrite H1.
+ destruct (eval_addrmode ge x rs); simpl in *; try discriminate.
+ erewrite Mem.load_float64al32; eauto.
split. unfold rs2. rewrite nextinstr_nf_inv1. SRes. apply preg_of_important.
intros. unfold rs2. repeat SOther.
Qed.
@@ -1726,6 +1730,10 @@ Proof.
intros. SOther.
(* float64 *)
econstructor; split.
+ apply exec_straight_one. simpl. unfold exec_store. erewrite Mem.storev_float64al32; eauto. auto.
+ intros. SOther.
+(* float64al32 *)
+ econstructor; split.
apply exec_straight_one. simpl. unfold exec_store. rewrite H1. eauto. auto.
intros. SOther.
Qed.
diff --git a/ia32/PrintAsm.ml b/ia32/PrintAsm.ml
index 8b795ee..b473464 100644
--- a/ia32/PrintAsm.ml
+++ b/ia32/PrintAsm.ml
@@ -363,7 +363,7 @@ let print_builtin_vload_common oc chunk addr res =
fprintf oc " movl %a, %a\n" addressing addr ireg res
| Mfloat32, FR res ->
fprintf oc " cvtss2sd %a, %a\n" addressing addr freg res
- | Mfloat64, FR res ->
+ | (Mfloat64 | Mfloat64al32), FR res ->
fprintf oc " movsd %a, %a\n" addressing addr freg res
| _ ->
assert false
@@ -406,7 +406,7 @@ let print_builtin_vstore_common oc chunk addr src =
| Mfloat32, FR src ->
fprintf oc " cvtsd2ss %a, %%xmm7\n" freg src;
fprintf oc " movss %%xmm7, %a\n" addressing addr
- | Mfloat64, FR src ->
+ | (Mfloat64 | Mfloat64al32), FR src ->
fprintf oc " movsd %a, %a\n" freg src addressing addr
| _ ->
assert false
diff --git a/ia32/standard/Stacklayout.v b/ia32/standard/Stacklayout.v
index 063fb4f..be854fd 100644
--- a/ia32/standard/Stacklayout.v
+++ b/ia32/standard/Stacklayout.v
@@ -107,7 +107,7 @@ Remark frame_env_aligned:
/\ (8 | fe.(fe_ofs_float_local))
/\ (8 | fe.(fe_ofs_float_callee_save))
/\ (4 | fe.(fe_ofs_retaddr))
- /\ (4 | fe.(fe_stack_data))
+ /\ (8 | fe.(fe_stack_data))
/\ (4 | fe.(fe_size)).
Proof.
intros.
@@ -128,8 +128,7 @@ Proof.
set (x6 := x5 + 8 * bound_float_local b).
assert (8 | x6). unfold x6. apply Zdivide_plus_r; auto. exists (bound_float_local b); ring.
set (x7 := x6 + 8 * bound_float_callee_save b).
- assert (4 | x7).
- apply Zdivides_trans with 8. exists 2; auto.
+ assert (8 | x7).
unfold x7. apply Zdivide_plus_r; auto. exists (bound_float_callee_save b); ring.
set (x8 := align (x7 + bound_stack_data b) 4).
assert (4 | x8). apply align_divides. omega.