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authorGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2014-01-12 10:48:56 +0000
committerGravatar xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2014-01-12 10:48:56 +0000
commit7998ccfd709b97f1a2306df4570365d58a5bb4b5 (patch)
treebf76efed90d88ede9e44187072b9cbd5265aab66 /ia32/PrintAsm.ml
parent362f2f36a44fa6ab4fe28264ed572d721adece70 (diff)
- Back to origins: suppress Mfloat64al32 chunk and align Mfloat64 to 4.
- Revised printing of intermediate RTL code. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2403 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'ia32/PrintAsm.ml')
-rw-r--r--ia32/PrintAsm.ml4
1 files changed, 2 insertions, 2 deletions
diff --git a/ia32/PrintAsm.ml b/ia32/PrintAsm.ml
index 0a666cb..01034f1 100644
--- a/ia32/PrintAsm.ml
+++ b/ia32/PrintAsm.ml
@@ -354,7 +354,7 @@ let print_builtin_vload_common oc chunk addr res =
end
| Mfloat32, [FR res] ->
fprintf oc " cvtss2sd %a, %a\n" addressing addr freg res
- | (Mfloat64 | Mfloat64al32), [FR res] ->
+ | Mfloat64, [FR res] ->
fprintf oc " movsd %a, %a\n" addressing addr freg res
| _ ->
assert false
@@ -396,7 +396,7 @@ let print_builtin_vstore_common oc chunk addr src tmp =
| Mfloat32, [FR src] ->
fprintf oc " cvtsd2ss %a, %%xmm7\n" freg src;
fprintf oc " movss %%xmm7, %a\n" addressing addr
- | (Mfloat64 | Mfloat64al32), [FR src] ->
+ | Mfloat64, [FR src] ->
fprintf oc " movsd %a, %a\n" freg src addressing addr
| _ ->
assert false