Merge of the float32 branch:

- added RTL type "Tsingle"
- ABI-compatible passing of single-precision floats on ARM and x86


git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2260 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e

1 files changed, 6 insertions, 0 deletions

diff --git a/ia32/Asmgen.v b/ia32/Asmgen.v
index 78f7d6e..4543ac9 100644
--- a/ia32/Asmgen.v
+++ b/ia32/Asmgen.v
@@ -103,6 +103,9 @@ Definition loadind (base: ireg) (ofs: int) (ty: typ) (dst: mreg) (k: code) :=
       | ST0  => OK (Pfld_m (Addrmode (Some base) None (inl _ ofs)) :: k)
       | _ => Error (msg "Asmgen.loadind")
       end
+  | Tsingle =>
+      do r <- freg_of dst;
+      OK (Pcvtss2sd_fm r (Addrmode (Some base) None (inl _ ofs)) :: k)
   | Tlong =>
       Error (msg "Asmgen.loadind")
   end.
@@ -118,6 +121,9 @@ Definition storeind (src: mreg) (base: ireg) (ofs: int) (ty: typ) (k: code) :=
       | ST0  => OK (Pfstp_m (Addrmode (Some base) None (inl _ ofs)) :: k)
       | _ => Error (msg "Asmgen.loadind")
       end
+  | Tsingle =>
+      do r <- freg_of src;
+      OK (Pcvtsd2ss_mf (Addrmode (Some base) None (inl _ ofs)) r :: k)
   | Tlong =>
       Error (msg "Asmgen.storeind")
   end.