diff options
| author |  xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2014-02-23 08:23:10 +0000 |
|---|---|---|
| committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2014-02-23 08:23:10 +0000 |
| commit | 11db3838a8cbfd09ecca368e87305054832a4719 (patch) | |
| tree | b48fb36fe0709ea794ffecbfca92680e3227edc3 /backend | |
| parent | 5af448143e8d548a8d73d8ed613156e331ca0e0b (diff) | |
In Regalloc, dead code elimination, don't eliminate move operations
that pop the x87 FP stack (var <- FP0). Otherwise, (void) f();
where f returns a float eventually produces a FP stack overflow.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2416 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'backend')
| -rw-r--r-- | backend/Regalloc.ml | 6 | ||||
| -rw-r--r-- | backend/XTL.ml | 6 | ||||
| -rw-r--r-- | backend/XTL.mli | 4 |
3 files changed, 13 insertions, 3 deletions
diff --git a/backend/Regalloc.ml b/backend/Regalloc.ml index b21eeb0..b736f29 100644 --- a/backend/Regalloc.ml +++ b/backend/Regalloc.ml @@ -228,7 +228,7 @@ let vset_addros vos after = let live_before instr after = match instr with | Xmove(src, dst) | Xspill(src, dst) | Xreload(src, dst) -> - if VSet.mem dst after + if VSet.mem dst after || is_stack_reg src then VSet.add src (VSet.remove dst after) else after | Xparmove(srcs, dsts, itmp, ftmp) -> @@ -302,7 +302,7 @@ let rec dce_parmove srcs dsts after = | [], [] -> [], [] | src1 :: srcs, dst1 :: dsts -> let (srcs', dsts') = dce_parmove srcs dsts after in - if VSet.mem dst1 after + if VSet.mem dst1 after || is_stack_reg src1 then (src1 :: srcs', dst1 :: dsts') else (srcs', dsts') | _, _ -> assert false @@ -310,7 +310,7 @@ let rec dce_parmove srcs dsts after = let dce_instr instr after k = match instr with | Xmove(src, dst) -> - if VSet.mem dst after + if VSet.mem dst after || is_stack_reg src then instr :: k else k | Xparmove(srcs, dsts, itmp, ftmp) -> diff --git a/backend/XTL.ml b/backend/XTL.ml index 46c59b0..9cb8e0a 100644 --- a/backend/XTL.ml +++ b/backend/XTL.ml @@ -64,6 +64,12 @@ let vlocs ll = List.map vloc ll let vmreg mr = L(R mr) let vmregs mrl = List.map vmreg mrl +(* Tests over variables *) + +let is_stack_reg = function + | L(R r) -> Machregs.is_stack_reg r + | _ -> false + (* Sets of variables *) module VSet = Set.Make(struct type t = var let compare = compare end) diff --git a/backend/XTL.mli b/backend/XTL.mli index 21671e9..75a3d65 100644 --- a/backend/XTL.mli +++ b/backend/XTL.mli @@ -65,6 +65,10 @@ val vlocs: loc list -> var list val vmreg: mreg -> var val vmregs: mreg list -> var list +(* Tests over variables *) + +val is_stack_reg: var -> bool + (* Sets of variables *) module VSet: Set.S with type elt = var |