diff options
| author |  xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2008-12-21 13:32:24 +0000 |
|---|---|---|
| committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2008-12-21 13:32:24 +0000 |
| commit | dc4bed2cf06f46687225275131f411c86c773598 (patch) | |
| tree | 9d99e759d906d061b6f213e0b20cb4bd53580ea6 /backend/Lineartyping.v | |
| parent | ec6d00d94bcb1a0adc5c698367634b5e2f370c6e (diff) | |
Revised back-end so that only 2 integer registers are reserved for reloading.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@925 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'backend/Lineartyping.v')
| -rw-r--r-- | backend/Lineartyping.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backend/Lineartyping.v b/backend/Lineartyping.v index 7dc601f..9ef6e31 100644 --- a/backend/Lineartyping.v +++ b/backend/Lineartyping.v @@ -83,7 +83,7 @@ Inductive wt_instr : instruction -> Prop := | wt_Ltailcall: forall sig ros, tailcall_possible sig -> - match ros with inl r => r = IT3 | _ => True end -> + match ros with inl r => r = IT1 | _ => True end -> wt_instr (Ltailcall sig ros) | wt_Lalloc: wt_instr Lalloc |