- Revised non-overflow constraints on memory injections so that

  injections compose (Values, Memdata, Memory)
- Memory chunks: Mfloat64 now has alignment 8; introduced Mfloat64al32
  that works like old Mfloat64 (i.e. has alignment 4); simplified
  handling of memcpy builtin accordingly.


git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1983 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e

8 files changed, 19 insertions, 24 deletions

diff --git a/arm/Asm.v b/arm/Asm.v
index 58b2634..1e4bfa0 100644
--- a/arm/Asm.v
+++ b/arm/Asm.v
@@ -515,11 +515,11 @@ Definition exec_instr (c: code) (i: instruction) (rs: regset) (m: mem) : outcome
   | Pfcvtsd r1 r2 =>
       OK (nextinstr (rs#r1 <- (Val.singleoffloat rs#r2))) m
   | Pfldd r1 r2 n =>
-      exec_load Mfloat64 (Val.add rs#r2 (Vint n)) r1 rs m
+      exec_load Mfloat64al32 (Val.add rs#r2 (Vint n)) r1 rs m
   | Pflds r1 r2 n =>
       exec_load Mfloat32 (Val.add rs#r2 (Vint n)) r1 rs m
   | Pfstd r1 r2 n =>      
-      exec_store Mfloat64 (Val.add rs#r2 (Vint n)) r1 rs m
+      exec_store Mfloat64al32 (Val.add rs#r2 (Vint n)) r1 rs m
   | Pfsts r1 r2 n =>
       match exec_store Mfloat32 (Val.add rs#r2 (Vint n)) r1 rs m with
       | OK rs' m' => OK (rs'#FR7 <- Vundef) m'
@@ -616,7 +616,7 @@ Inductive extcall_arg (rs: regset) (m: mem): loc -> val -> Prop :=
       extcall_arg rs m (S (Outgoing ofs Tint)) v
   | extcall_arg_float_stack: forall ofs bofs v,
       bofs = Stacklayout.fe_ofs_arg + 4 * ofs ->
-      Mem.loadv Mfloat64 m (Val.add (rs (IR IR13)) (Vint (Int.repr bofs))) = Some v ->
+      Mem.loadv Mfloat64al32 m (Val.add (rs (IR IR13)) (Vint (Int.repr bofs))) = Some v ->
       extcall_arg rs m (S (Outgoing ofs Tfloat)) v.
 
 Definition extcall_arguments
diff --git a/arm/Asmgen.v b/arm/Asmgen.v
index 7cf25f5..4200c11 100644
--- a/arm/Asmgen.v
+++ b/arm/Asmgen.v
@@ -469,7 +469,7 @@ Definition transl_instr (f: Mach.function) (i: Mach.instruction) (k: code) :=
           transl_load_store_int Pldr is_immed_mem_word dst addr args k
       | Mfloat32 =>
           transl_load_store_float Pflds is_immed_mem_float dst addr args k
-      | Mfloat64 =>
+      | Mfloat64 | Mfloat64al32 =>
           transl_load_store_float Pfldd is_immed_mem_float dst addr args k
       end
   | Mstore chunk addr args src =>
@@ -486,7 +486,7 @@ Definition transl_instr (f: Mach.function) (i: Mach.instruction) (k: code) :=
           transl_load_store_int Pstr is_immed_mem_word src addr args k
       | Mfloat32 =>
           transl_load_store_float Pfsts is_immed_mem_float src addr args k
-      | Mfloat64 =>
+      | Mfloat64 | Mfloat64al32 =>
           transl_load_store_float Pfstd is_immed_mem_float src addr args k
       end
   | Mcall sig (inl r) =>
diff --git a/arm/Asmgenproof.v b/arm/Asmgenproof.v
index a888aae..8ee9c2e 100644
--- a/arm/Asmgenproof.v
+++ b/arm/Asmgenproof.v
@@ -816,6 +816,7 @@ Proof.
   left; eapply exec_straight_steps; eauto with coqlib.
   exists m'; split; auto.
   destruct chunk; simpl; simpl in H6;
+  try (generalize (Mem.loadv_float64al32 _ _ _ H0); intros);
   (eapply transl_load_int_correct || eapply transl_load_float_correct);
   eauto; intros; reflexivity.
 Qed.
@@ -843,6 +844,7 @@ Proof.
   destruct chunk; simpl; simpl in H6;
   try (rewrite storev_8_signed_unsigned in H0);
   try (rewrite storev_16_signed_unsigned in H0);
+  try (generalize (Mem.storev_float64al32 _ _ _ _ H0); intros);
   simpl;
   (eapply transl_store_int_correct || eapply transl_store_float_correct);
   eauto; intros; simpl; auto.
diff --git a/arm/Asmgenproof1.v b/arm/Asmgenproof1.v
index 29197e9..e7d2509 100644
--- a/arm/Asmgenproof1.v
+++ b/arm/Asmgenproof1.v
@@ -802,7 +802,7 @@ Qed.
 
 Lemma loadind_float_correct:
   forall (base: ireg) ofs dst (rs: regset) m v k,
-  Mem.loadv Mfloat64 m (Val.add rs#base (Vint ofs)) = Some v ->
+  Mem.loadv Mfloat64al32 m (Val.add rs#base (Vint ofs)) = Some v ->
   exists rs',
      exec_straight (loadind_float base ofs dst k) rs m k rs' m
   /\ rs'#dst = v
@@ -868,7 +868,7 @@ Qed.
 
 Lemma storeind_float_correct:
   forall (base: ireg) ofs (src: freg) (rs: regset) m m' k,
-  Mem.storev Mfloat64 m (Val.add rs#base (Vint ofs)) (rs#src) = Some m' ->
+  Mem.storev Mfloat64al32 m (Val.add rs#base (Vint ofs)) (rs#src) = Some m' ->
   base <> IR14 ->
   exists rs',
      exec_straight (storeind_float src base ofs k) rs m k rs' m'
diff --git a/arm/Op.v b/arm/Op.v
index fa05288..cfe8b83 100644
--- a/arm/Op.v
+++ b/arm/Op.v
@@ -342,17 +342,6 @@ Definition type_of_addressing (addr: addressing) : list typ :=
   | Ainstack _ => nil
   end.
 
-Definition type_of_chunk (c: memory_chunk) : typ :=
-  match c with
-  | Mint8signed => Tint
-  | Mint8unsigned => Tint
-  | Mint16signed => Tint
-  | Mint16unsigned => Tint
-  | Mint32 => Tint
-  | Mfloat32 => Tfloat
-  | Mfloat64 => Tfloat
-  end.
-
 (** Weak type soundness results for [eval_operation]:
   the result values, when defined, are always of the type predicted
   by [type_of_operation]. *)
diff --git a/arm/PrintAsm.ml b/arm/PrintAsm.ml
index 6d6296b..ec1e836 100644
--- a/arm/PrintAsm.ml
+++ b/arm/PrintAsm.ml
@@ -343,7 +343,7 @@ let print_builtin_vload oc chunk args res =
     | Mfloat32, [IR addr], FR res ->
         fprintf oc "	flds	%a, [%a, #0]\n" freg_single res ireg addr;
         fprintf oc "	fcvtds	%a, %a\n" freg res freg_single res; 2
-    | Mfloat64, [IR addr], FR res ->
+    | (Mfloat64 | Mfloat64al32), [IR addr], FR res ->
         fprintf oc "	fldd	%a, [%a, #0]\n" freg res ireg addr; 1
     | _ ->
         assert false
@@ -363,7 +363,7 @@ let print_builtin_vstore oc chunk args =
     | Mfloat32, [IR addr; FR src] ->
         fprintf oc "	fcvtsd	%a, %a\n" freg_single FR6 freg src;
         fprintf oc "	fsts	%a, [%a, #0]\n" freg_single FR6 ireg addr; 2
-    | Mfloat64, [IR addr; FR src] ->
+    | (Mfloat64 | Mfloat64al32), [IR addr; FR src] ->
         fprintf oc "	fstd	%a, [%a, #0]\n" freg src ireg addr; 1
     | _ ->
         assert false
diff --git a/arm/SelectOp.vp b/arm/SelectOp.vp
index 6049017..9296ce6 100644
--- a/arm/SelectOp.vp
+++ b/arm/SelectOp.vp
@@ -426,6 +426,7 @@ Definition can_use_Aindexed2 (chunk: memory_chunk): bool :=
   | Mint32 => true
   | Mfloat32 => false
   | Mfloat64 => false
+  | Mfloat64al32 => false
   end.
 
 Definition can_use_Aindexed2shift (chunk: memory_chunk): bool :=
@@ -437,6 +438,7 @@ Definition can_use_Aindexed2shift (chunk: memory_chunk): bool :=
   | Mint32 => true
   | Mfloat32 => false
   | Mfloat64 => false
+  | Mfloat64al32 => false
   end.
 
 Nondetfunction addressing (chunk: memory_chunk) (e: expr) :=
diff --git a/arm/linux/Stacklayout.v b/arm/linux/Stacklayout.v
index 4521114..d84da6b 100644
--- a/arm/linux/Stacklayout.v
+++ b/arm/linux/Stacklayout.v
@@ -109,7 +109,7 @@ Remark frame_env_aligned:
   /\ (8 | fe.(fe_ofs_float_local))
   /\ (8 | fe.(fe_ofs_float_callee_save))
   /\ (4 | fe.(fe_ofs_retaddr))
-  /\ (4 | fe.(fe_stack_data))
+  /\ (8 | fe.(fe_stack_data))
   /\ (8 | fe.(fe_size)).
 Proof.
   intros.
@@ -128,13 +128,15 @@ Proof.
   set (x5 := x4 + 8 * bound_float_local b).
   assert (8 | x5). unfold x5. apply Zdivide_plus_r; auto. exists (bound_float_local b); ring.
   set (x6 := x5 + 8 * bound_float_callee_save b).
-  assert (4 | x6).
-    apply Zdivides_trans with 8. exists 2; auto.
+  assert (8 | x6).
     unfold x6. apply Zdivide_plus_r; auto. exists (bound_float_callee_save b); ring.
+  assert (4 | x6).
+    apply Zdivides_trans with 8. exists 2; auto. auto.
   set (x7 := x6 + 4).
   assert (4 | x7). unfold x7; apply Zdivide_plus_r; auto. exists 1; auto.
   set (x8 := x7 + 4).
-  assert (4 | x8). unfold x8; apply Zdivide_plus_r; auto. exists 1; auto.
+  assert (8 | x8). unfold x8, x7. replace (x6 + 4 + 4) with (x6 + 8) by omega.
+    apply Zdivide_plus_r; auto. exists 1; auto.
   set (x9 := align (x8 + bound_stack_data b) 8).
   assert (8 | x9). unfold x9; apply align_divides. omega.
   tauto.